From 7fabaa5313352a563568504a8354aaf11c1af85a Mon Sep 17 00:00:00 2001
From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Fri, 26 Nov 2021 11:42:49 +0100
Subject: [PATCH] pci: sh7780: Use PCI_CONF1_ADDRESS() macro
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

PCI sh7780 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 drivers/pci/pci_sh7780.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pci_sh7780.c b/drivers/pci/pci_sh7780.c
index 06d711a6cb..7533286c01 100644
--- a/drivers/pci/pci_sh7780.c
+++ b/drivers/pci/pci_sh7780.c
@@ -34,9 +34,9 @@
 int pci_sh4_read_config_dword(struct pci_controller *hose,
 				    pci_dev_t dev, int offset, u32 *value)
 {
-	u32 par_data = 0x80000000 | dev;
+	u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset);
 
-	p4_out(par_data | (offset & 0xfc), SH7780_PCIPAR);
+	p4_out(par_data, SH7780_PCIPAR);
 	*value = p4_in(SH7780_PCIPDR);
 
 	return 0;
@@ -45,9 +45,9 @@ int pci_sh4_read_config_dword(struct pci_controller *hose,
 int pci_sh4_write_config_dword(struct pci_controller *hose,
 				     pci_dev_t dev, int offset, u32 value)
 {
-	u32 par_data = 0x80000000 | dev;
+	u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset);
 
-	p4_out(par_data | (offset & 0xfc), SH7780_PCIPAR);
+	p4_out(par_data, SH7780_PCIPAR);
 	p4_out(value, SH7780_PCIPDR);
 	return 0;
 }
-- 
2.39.5