From: Dylan Hung <kobedylan@gmail.com>
Date: Thu, 27 Jul 2023 01:58:14 +0000 (+0800)
Subject: net: ftgmac100: Add reset control
X-Git-Tag: v2025.01-rc5-pxa1908~783^2~10
X-Git-Url: http://git.dujemihanovic.xyz/html/static/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=607e7fa622b155865612bd668e3b39f7f2a1069e;p=u-boot.git

net: ftgmac100: Add reset control

Add optional reset control, especially for the Aspeed SOC. For the
hardware without a reset line, the reset assertion/deassertion will be
skipped.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
---

diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 587d3658fa..9b536fd5ab 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <clk.h>
+#include <reset.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <log.h>
@@ -91,6 +92,7 @@ struct ftgmac100_data {
 	u32 max_speed;
 
 	struct clk_bulk clks;
+	struct reset_ctl *reset_ctl;
 
 	/* End of RX/TX ring buffer bits. Depend on model */
 	u32 rxdes0_edorr_mask;
@@ -569,6 +571,8 @@ static int ftgmac100_of_to_plat(struct udevice *dev)
 		priv->txdes0_edotr_mask = BIT(15);
 	}
 
+	priv->reset_ctl = devm_reset_control_get_optional(dev, NULL);
+
 	return clk_get_bulk(dev, &priv->clks);
 }
 
@@ -594,6 +598,12 @@ static int ftgmac100_probe(struct udevice *dev)
 	if (ret)
 		goto out;
 
+	if (priv->reset_ctl) {
+		ret = reset_deassert(priv->reset_ctl);
+		if (ret)
+			goto out;
+	}
+
 	/*
 	 * If DM MDIO is enabled, the MDIO bus will be initialized later in
 	 * dm_eth_phy_connect
@@ -629,6 +639,8 @@ static int ftgmac100_remove(struct udevice *dev)
 	free(priv->phydev);
 	mdio_unregister(priv->bus);
 	mdio_free(priv->bus);
+	if (priv->reset_ctl)
+		reset_assert(priv->reset_ctl);
 	clk_release_bulk(&priv->clks);
 
 	return 0;