From: Pali Rohár <pali@kernel.org>
Date: Fri, 22 Oct 2021 14:22:14 +0000 (+0200)
Subject: pci: pci_mvebu: Setup PCI controller to Root Complex mode
X-Git-Tag: v2025.01-rc5-pxa1908~1652^2~21
X-Git-Url: http://git.dujemihanovic.xyz/html/static/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=2344a76f29a54d6521af0a4d3b5b9e6c407a7bfa;p=u-boot.git

pci: pci_mvebu: Setup PCI controller to Root Complex mode

Root Complex should be the default mode, let's set it explicitly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
---

diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 4c7fd8d5a9..a327a83411 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -62,6 +62,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define  PCIE_MASK_ENABLE_INTS          (0xf << 24)
 #define PCIE_CTRL_OFF			0x1a00
 #define  PCIE_CTRL_X1_MODE		BIT(0)
+#define  PCIE_CTRL_RC_MODE		BIT(1)
 #define PCIE_STAT_OFF			0x1a04
 #define  PCIE_STAT_BUS                  (0xff << 8)
 #define  PCIE_STAT_DEV                  (0x1f << 16)
@@ -373,6 +374,11 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
 	u32 reg;
 
+	/* Setup PCIe controller to Root Complex mode */
+	reg = readl(pcie->base + PCIE_CTRL_OFF);
+	reg |= PCIE_CTRL_RC_MODE;
+	writel(reg, pcie->base + PCIE_CTRL_OFF);
+
 	/*
 	 * Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
 	 * because default value is Memory controller (0x508000) which