]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
8 weeks agoacpi: x86: Move SPCR and DBG2 into common code
Maximilian Brune [Wed, 23 Oct 2024 13:19:44 +0000 (15:19 +0200)]
acpi: x86: Move SPCR and DBG2 into common code

This moves the SPCR and DBG2 table generation into common code, so that
they can be used by architectures other than x86.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
8 weeks agoMerge a patch series to improve dc2114x support
Tom Rini [Sun, 27 Oct 2024 16:15:43 +0000 (10:15 -0600)]
Merge a patch series to improve dc2114x support

This patch series by Hanyuan Zhao <hanyuan-z@qq.com> provides a number of
improvements to the dc2114x driver.

Link: https://lore.kernel.org/r/tencent_BD4B002FC63A5F77969D9BD1FFF125371C08@qq.com
8 weeks agoMerge patch series "net: ksz9477: add support for KSZ GbE switches using SPI bus"
Tom Rini [Sun, 27 Oct 2024 16:19:57 +0000 (10:19 -0600)]
Merge patch series "net: ksz9477: add support for KSZ GbE switches using SPI bus"

Romain Naour <romain.naour@smile.fr> says:

We are using a custom board where an ethernet switch device KSZ9896 is
available. This family of devices can use several types of serial bus
as management interface: mdio, i2c or SPI. Due to board design
constraints and because we initially planned to use this device only
from Linux, the SPI bus was used.

Luckily we are using a recent enough u-boot release where KSZ9477
driver is available... but only for the i2c interface. Indeed, unlike
the kernel driver, the KSZ9477 driver doesn't use the regmap API to
access the underlying bus since the regmap API is limited to direct
memory access [1].

Until regmap API with bus support is available in U-boot, we introduced
struct ksz_phy_ops to store low-level ksz bus operations (I2C or SPI).

This series has been tested on the current master branch (after v2024.10
release).

[1] https://source.denx.de/u-boot/u-boot/-/blob/v2024.10-rc5/drivers/core/Kconfig?ref_type=tags#L188

Link: https://lore.kernel.org/r/20241008075435.1572727-1-romain.naour@smile.fr
8 weeks agoMerge patch series "Add driver for Motorcomm YT8821 2.5G ethernet phy"
Tom Rini [Sun, 27 Oct 2024 16:19:06 +0000 (10:19 -0600)]
Merge patch series "Add driver for Motorcomm YT8821 2.5G ethernet phy"

Frank Sae <Frank.Sae@motor-comm.com> says:

YT8531 as Gigabit transceiver uses bit15:14(bit9 reserved default 0) as phy
speed mask, YT8821 as 2.5 Gigabit transceiver uses bit9 bit15:14 as phy
speed mask.

Be compatible to YT8821, reform phy speed mask and phy speed macro.

Based on update above, add YT8821 2.5G phy driver.

Link: https://lore.kernel.org/r/20240912120225.28884-1-Frank.Sae@motor-comm.com
8 weeks agonet: recv(): return -EAGAIN instead of 0 when no cleanup is expected
Jerome Forissier [Wed, 9 Oct 2024 09:42:08 +0000 (11:42 +0200)]
net: recv(): return -EAGAIN instead of 0 when no cleanup is expected

Some drivers do not behave properly when free_pkt() is called with a
length of zero. It is an issue I observed when developing the lwIP
series [1] (see "QEMU CI tests for r2dplus_i82557c, r2dplus_rtl8139"
in the change log) and which I fixed incorrectly by not calling
free_pkt() when recv() returns 0. That turned out to be wrong for two
reasons:

1. The DM documentation [2] clearly requires it:

  "The **recv** function polls for availability of a new packet. [...]
   If there is an error [...], return 0 if you require the packet to
   be cleaned up normally, or a negative error code otherwise (cleanup
   not necessary or already done).

   If **free_pkt** is defined, U-Boot will call it after a received
   packet has been processed [...]. free_pkt() will be called after
   recv(), for the same packet [...]"

2. The imx8mp_evk platform will fail with OOM errors if free_pkt() is
   not called after recv() returns 0:

   u-boot=> tftp 192.168.0.16:50M
   Using ethernet@30be0000 device
   TFTP from server 192.168.0.16; our IP address is 192.168.0.48
   Filename '50M'.
   Load address: 0x40480000
   Loading: #######################fecmxc_recv: error allocating packetp
   fecmxc_recv: error allocating packetp
   fecmxc_recv: error allocating packetp
   ...

Therefore, make recv() return -EAGAIN instead of 0 when no packet is
available and the driver doesn't expect free_pkt() to be called
subsequently.

[1] https://lists.denx.de/pipermail/u-boot/2024-August/562861.html
[2] doc/develop/driver-model/ethernet.rst

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 weeks agonet: ksz9477: add support for KSZ GbE switches using SPI bus
Romain Naour [Tue, 8 Oct 2024 07:54:32 +0000 (09:54 +0200)]
net: ksz9477: add support for KSZ GbE switches using SPI bus

The Microchip KSZ Gigabit Ethernet Switches support
SGMII/RGMII/MII/RMII with register access via SPI, I2C, or MDIO.

Since this driver is now able to check the underlying bus type,
handle the case when the SPI bus is used.

The SPI bus is only used for 8/16/32 wide access of registers.

Reword Kconfig option to include SPI bus support.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: prepare ksz9477 without I2C support
Romain Naour [Tue, 8 Oct 2024 07:54:31 +0000 (09:54 +0200)]
net: ksz9477: prepare ksz9477 without I2C support

With the upcoming ksz9477 SPI support added, the I2C support
will be optional. Either the I2C or the SPI bus will be used.

For now, DM_I2C is still mandatory.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: rename ksz_i2c_probe() to ksz_probe()
Romain Naour [Tue, 8 Oct 2024 07:54:30 +0000 (09:54 +0200)]
net: ksz9477: rename ksz_i2c_probe() to ksz_probe()

In order to support management bus other than the I2C, rename
ksz_i2c_probe() to ksz_probe() since this function is no longer
specific to the I2C bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: store ksz bus operations functions
Romain Naour [Tue, 8 Oct 2024 07:54:29 +0000 (09:54 +0200)]
net: ksz9477: store ksz bus operations functions

The ksz9477 Linux kernel driver is based on regmap API to seamlessly
communicate to switch devices connected via different buses like SPI
or I2C. The current regmap implementation in U-Boot only supports
memory-mapped registers access [1].

Until regmap API with bus support is available in U-boot, introduce
struct ksz_phy_ops to store low-level ksz bus operations (I2C for now).

[1] https://lists.denx.de/pipermail/u-boot/2018-May/329392.html

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: set i2c bus offset length only when needed
Romain Naour [Tue, 8 Oct 2024 07:54:28 +0000 (09:54 +0200)]
net: ksz9477: set i2c bus offset length only when needed

In order to add ksz9477 SPI bus support, check parent bus
is an I2C bus before calling i2c_set_offset_len().

Doing so, ksz_i2c_probe() will now return an error (-EINVAL) if
the parent bus is not the one expected by the ksz-switch u-boot
driver.

Indeed, the DSA KSZ devicetree binding doesn't specify anything
about the underlying bus between the SoC and the DSA switch, so
the same "compatible" string can be used wathever the management
interface used (SPI or I2C).

The ksz-switch u-boot driver currently only support I2C interface
but will match a compatible "microchip,ksz9xxx" located under
under an SPI bus node.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: rename udevice_id tab to ksz_ids
Romain Naour [Tue, 8 Oct 2024 07:54:27 +0000 (09:54 +0200)]
net: ksz9477: rename udevice_id tab to ksz_ids

The DSA KSZ devicetree binding doesn't specify anything about the
underlying bus between the SoC and the DSA switch, so the same
"compatible" string can be used wathever the management interface
used. The driver must be able to access the underlying bus without
any help from the compatible string (like for TPM2 TIS devices).

So, rename udevice_id tab to ksz_ids since it's not specific to i2c
bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: add KSZ9896 switch support
Romain Naour [Tue, 8 Oct 2024 07:54:26 +0000 (09:54 +0200)]
net: ksz9477: add KSZ9896 switch support

Add support for the KSZ9896 6-port Gigabit Ethernet Switch to the
ksz9477 driver.

The KSZ9896 is similar to KSZ9897 but has only one configurable
MII/RMII/RGMII/GMII cpu port.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: remove dev_set_parent_priv() call
Romain Naour [Tue, 8 Oct 2024 07:54:25 +0000 (09:54 +0200)]
net: ksz9477: remove dev_set_parent_priv() call

The ksz9477 is currently the only driver using dev_set_parent_priv()
outside of the driver model. Also, there was no explanation in the
commit adding ksz9477 driver and why dev_set_parent_priv() is
required.

Actually there is a typo in ksz_mdio_probe() while retrieving
the parent (switch@0) private data:

- priv->ksz = dev_get_parent_priv(dev->parent);
+ priv->ksz = dev_get_priv(dev->parent);

Printing the address of struct ksz_dsa_priv *priv allows
to notice the slight difference:

ksz_i2c_probe: ksz_dsa_priv *priv 0xfdf45768 // address of the saved priv
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45798 // address returned by dev_get_parent_priv(dev->parent)
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45768 // address returned by dev_get_priv(dev->parent)

The ksz_mdio driver get the wrong data and without
dev_set_parent_priv() the mdio driver fail to access the underlying
bus.

While it doesn't cause any issue with I2C bus, it override the
per-child data used by the SPI bus (struct spi_slave) and prevent
further bus access (even with sspi command).

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: ksz9477: move struct ksz_dsa_priv *priv declaration
Romain Naour [Tue, 8 Oct 2024 07:54:24 +0000 (09:54 +0200)]
net: ksz9477: move struct ksz_dsa_priv *priv declaration

struct ksz_dsa_priv *priv should be declared before dev_dbg()

Signed-off-by: Romain Naour <romain.naour@smile.fr>
8 weeks agonet: phy: motorcomm: Add driver for Motorcomm YT8821 2.5G ethernet phy
Frank Sae [Thu, 12 Sep 2024 12:02:25 +0000 (05:02 -0700)]
net: phy: motorcomm: Add driver for Motorcomm YT8821 2.5G ethernet phy

Add a driver for the motorcomm YT8821 2.5G ethernet phy which works in
2500base-x mode.

Verify the driver on BPI-R3(with MediaTek MT7986(Filogic 830) SoC) evb.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
8 weeks agonet: phy: motorcomm: Optimize phy speed mask to be compatible to YT8821
Frank Sae [Thu, 12 Sep 2024 12:02:24 +0000 (05:02 -0700)]
net: phy: motorcomm: Optimize phy speed mask to be compatible to YT8821

YT8531 as Gigabit transceiver uses bit15:14(bit9 reserved default 0) as phy
speed mask, YT8821 as 2.5 Gigabit transceiver uses bit9 bit15:14 as phy
speed mask.

Be compatible to YT8821, reform phy speed mask and phy speed macro.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
8 weeks agonet: dc2114x: remove the pass all multicast flag in operation mode settings
Hanyuan Zhao [Fri, 9 Aug 2024 08:57:01 +0000 (16:57 +0800)]
net: dc2114x: remove the pass all multicast flag in operation mode settings

Remove the OMR_PM flag and choose 16 perfect filtering mode since in
modern networks there're plenty of multicasts and set ORM_PM flag will
increase the dc2114x's workload and ask the U-Boot to handle packets
not related to itself. And most of the time, U-Boot does not need this
feature.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: allow users to decide how to tx packets according to IP core
Hanyuan Zhao [Fri, 9 Aug 2024 08:57:00 +0000 (16:57 +0800)]
net: dc2114x: allow users to decide how to tx packets according to IP core

Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. Originally this
driver uses only one tx descriptor and organizes it as a ring buffer,
which would lead to a problem that one packet would be sent twice.
This commit adds support to prevent this bug if you are using IP
cores with this issue, by using multiple tx descriptors and
organizing them as a real well-defined ring buffer.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: allow users to decide whether to detect the tx No Carrier errors
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:59 +0000 (16:56 +0800)]
net: dc2114x: allow users to decide whether to detect the tx No Carrier errors

Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. A packet could be
sent successfully but reported with No Carrier error. Latest drivers
of this IP core have not detect this error anymore.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: remove unused lines and change the var and print types
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:58 +0000 (16:56 +0800)]
net: dc2114x: remove unused lines and change the var and print types

This commit fixes a problem that even though the network card does not report
any issues in transmitting a setup frame, the driver prints the error status
every time. Let's set it for debug use.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: add support for CPUs that have cache between the memory and the card
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:57 +0000 (16:56 +0800)]
net: dc2114x: add support for CPUs that have cache between the memory and the card

This commit adds support for the MIPS and LoongArch CPUs, which would use cache
after they jump into U-Boot. This commit requests the CPU to return the
addresses in uncached windows and flushes the cache in need, to make sure the
memory between the CPU and the network card is in consistency.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: set the card number to start at zero
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:56 +0000 (16:56 +0800)]
net: dc2114x: set the card number to start at zero

Otherwise the number might get kind of weird.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: get mac address from environment
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:55 +0000 (16:56 +0800)]
net: dc2114x: get mac address from environment

Let this old driver work like the other newer network card drivers, loading the
MAC address from environment, which could be more flexible to set.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
8 weeks agonet: dc2114x: add support for platforms that don't have pci controllers
Hanyuan Zhao [Fri, 9 Aug 2024 08:56:54 +0000 (16:56 +0800)]
net: dc2114x: add support for platforms that don't have pci controllers

There're a few ethernet IP cores which have the same functions with dc2114x,
and can be connected to CPU by AXI or other buses. This commit adds support
for the platforms that do not have PCI controllers, using MMIO to communicate
with the dc2114x IP core.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2 months agoMerge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Sat, 26 Oct 2024 14:10:31 +0000 (08:10 -0600)]
Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update

2 months agorockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS
Jonas Karlman [Thu, 17 Oct 2024 20:00:27 +0000 (20:00 +0000)]
rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS

Update defconfig to enable features included in pending upstream DT and
implement board_fit_config_name_match() to load correct DT for LTS and
non-LTS version of the NanoPC-T6.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoadc: rockchip-saradc: Use vdd-microvolts prop as fallback
Jonas Karlman [Thu, 17 Oct 2024 20:00:26 +0000 (20:00 +0000)]
adc: rockchip-saradc: Use vdd-microvolts prop as fallback

Change to use vdd-microvolts prop value as voltage reference when the
supply regulator is missing or when DM_REGULATOR=n is used.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoadc: Allow use of adc with DM_REGULATOR disabled
Jonas Karlman [Thu, 17 Oct 2024 20:00:25 +0000 (20:00 +0000)]
adc: Allow use of adc with DM_REGULATOR disabled

When DM_REGULATOR=n is used the device_get_supply_regulator() function
always return -ENOSYS.

Change to treat missing support for regulators as a missing optional
vdd/vss-supply regulator to reduce error messages being logged.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: rk3588-nanopc-t6: Drop upstream props from u-boot.dtsi
Jonas Karlman [Thu, 17 Oct 2024 20:00:24 +0000 (20:00 +0000)]
rockchip: rk3588-nanopc-t6: Drop upstream props from u-boot.dtsi

The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes from u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: add SPI flash on NanoPC-T6
Marcin Juszkiewicz [Thu, 17 Oct 2024 20:00:23 +0000 (20:00 +0000)]
arm64: dts: rockchip: add SPI flash on NanoPC-T6

FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: a22a629c63b1addcf2d81eaf30383c1deca5b7a9 ]

(cherry picked from commit 7588da65fdf09c7de9f903780c212a8ae96f2866)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: add NanoPC-T6 LTS
Marcin Juszkiewicz [Thu, 17 Oct 2024 20:00:22 +0000 (20:00 +0000)]
arm64: dts: rockchip: add NanoPC-T6 LTS

In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.

There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector

The top USB 2.0 connector comes directly from the SoC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: db1dcbe5f752d423421f77d54d246398b196f670 ]

(cherry picked from commit f4a834fbc8cdb40fddd63d083e8d1c6189ba62dc)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: move NanoPC-T6 parts to DTS
Marcin Juszkiewicz [Thu, 17 Oct 2024 20:00:21 +0000 (20:00 +0000)]
arm64: dts: rockchip: move NanoPC-T6 parts to DTS

MiniPCIe slot is present only in first version of NanoPC-T6 (2301).

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: aea8d84070fe0846961deb23228d9dd3f8caefb3 ]

(cherry picked from commit 697963b1c22336a44ac2e33536c652aae1671b3d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: prepare NanoPC-T6 for LTS board
Marcin Juszkiewicz [Thu, 17 Oct 2024 20:00:20 +0000 (20:00 +0000)]
arm64: dts: rockchip: prepare NanoPC-T6 for LTS board

FriendlyELEC introduced a second version of NanoPC-T6 SBC.

Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: d14f3a4f1feabb6bb5935bf3b275a1e6bf2208eb ]

(cherry picked from commit e8b52bdfe5a1444edd1b9bb7cc10b9781d72cc84)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: rk3399-pinephone-pro: Drop upstream props from u-boot.dtsi
Jonas Karlman [Wed, 16 Oct 2024 20:15:21 +0000 (20:15 +0000)]
rockchip: rk3399-pinephone-pro: Drop upstream props from u-boot.dtsi

The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: rk3588-rock-5b: Drop upstream props from u-boot.dtsi
Jonas Karlman [Wed, 16 Oct 2024 20:14:11 +0000 (20:14 +0000)]
rockchip: rk3588-rock-5b: Drop upstream props from u-boot.dtsi

The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: board: Increase rng-seed size to make it sufficient for modern Linux
Alex Shumsky [Wed, 16 Oct 2024 10:02:03 +0000 (13:02 +0300)]
rockchip: board: Increase rng-seed size to make it sufficient for modern Linux

Increase rng-seed size to make Linux happy and initialize rng pool instantly.
Linux 5.19+ requires 32 bytes of entropy to initialize random pool, but u-boot
currently provides only 8 bytes.
Linux 5.18 and probably some versions before it used to require 64 bytes.
Bump min value to 64 bytes to be on a safe side.

Boot with 8 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [   12.089286] random: crng init done
Boot with 32 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [    0.000000] random: crng init done

Linux source references:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.19#n551
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.18#n236

Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: d2048bafae40 ("rockchip: board: Add board_rng_seed() for all Rockchip devices")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoMerge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Sat, 26 Oct 2024 00:51:05 +0000 (18:51 -0600)]
Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.

2 months agoARM: imx: soc: Move default TEXT_BASE for i.MX7
Marek Vasut [Sun, 20 Oct 2024 21:00:39 +0000 (23:00 +0200)]
ARM: imx: soc: Move default TEXT_BASE for i.MX7

Move i.MX7 TEXT_BASE/SPL_TEXT_BASE to Kconfig and common/spl/Kconfig
which is the best practice.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2 months agoARM: imx: soc: Select default TEXT_BASE for i.MX6
Marek Vasut [Sun, 20 Oct 2024 21:00:38 +0000 (23:00 +0200)]
ARM: imx: soc: Select default TEXT_BASE for i.MX6

Select default U-Boot and SPL text base for the i.MX6 SoC. The U-Boot
and SPL text base is picked as the one used by various i.MX6 boards.
Update all the boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2 months agoARM: dts: imxrt1170: Fix default cells value warnings
Jesse Taube [Fri, 25 Oct 2024 02:02:28 +0000 (22:02 -0400)]
ARM: dts: imxrt1170: Fix default cells value warnings

Add #address-cells and #size-cells to the memory node to fix warnings

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2 months agoconfigs: imxrt1050-evk: Enable standard boot
Jesse Taube [Fri, 25 Oct 2024 02:02:27 +0000 (22:02 -0400)]
configs: imxrt1050-evk: Enable standard boot

Enable standard boot support and add default environments for the
imxrt1050-evk board.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2 months agoimx: imxrt1050-evk: Fix missing clocks for mmc
Jesse Taube [Fri, 25 Oct 2024 02:02:26 +0000 (22:02 -0400)]
imx: imxrt1050-evk: Fix missing clocks for mmc

Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
2 months agoimx: imxrt*: Fix binman breaking boot
Jesse Taube [Fri, 25 Oct 2024 02:02:25 +0000 (22:02 -0400)]
imx: imxrt*: Fix binman breaking boot

The init_r parsing of U-Boot device tree to search the binman
information errors. set CONFIG_BINMAN_FDT to no to fix this.

Fixes: 7079eeb72fc ("imx: imxrt1050-evk: Add support for SPI flash booting
s")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2 months agoarm64: imx: Deduplicate DH i.MX6 DHSOM defconfig
Marek Vasut [Fri, 25 Oct 2024 22:55:06 +0000 (00:55 +0200)]
arm64: imx: Deduplicate DH i.MX6 DHSOM defconfig

Deduplicate defconfigs for all DH i.MX6 DHSOM by including common
configs/imx_dhsom_defconfig . This does introduce changes to the
board configuration, namely it enables commands used on all DHSOM
devices consistenty, the prompt is changed to u-boot=>, support for
booting non-Linux OS which was likely never used is disabled, GPT
partition table support is enabled, generic MTD support is enabled,
LED support is enabled, DM PHY, PMIC and regulator support is also
enabled, KASLR command is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
2 months agoarm64: imx: Deduplicate DH i.MX8MP DHSOM defconfigs
Marek Vasut [Fri, 25 Oct 2024 22:55:05 +0000 (00:55 +0200)]
arm64: imx: Deduplicate DH i.MX8MP DHSOM defconfigs

Deduplicate defconfigs for all DH i.MX8MP DHSOM by factoring out the
common parts into generic _dhsom_defconfig and including those using
the #include <configs/...> preprocessor macro, which is applicable to
defconfigs as well. This enables CMD_EXPORTENV on all iMX8MP DHSOM
systems to be consistent with other DHSOM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
2 months agoarm64: imx: imx8mp: Disable PCA954x I2C mux on DH i.MX8MP DRC02 and PicoITX
Marek Vasut [Fri, 25 Oct 2024 22:55:04 +0000 (00:55 +0200)]
arm64: imx: imx8mp: Disable PCA954x I2C mux on DH i.MX8MP DRC02 and PicoITX

Neither the DRC02 nor PicoITX carrier board contains the PCA954x I2C mux
chip, the chip is only present on PDK3 carrier board. Disable support for
the PCA954x mux chip and I2C mux altogether on both i.MX8MP DHCOM DRC02 and
PicoITX.

Signed-off-by: Marek Vasut <marex@denx.de>
2 months agoarm64: imx: imx8mp: Disable PCI support on DH i.MX8MP DHCOM SoM on DRC02 board
Marek Vasut [Fri, 25 Oct 2024 22:55:03 +0000 (00:55 +0200)]
arm64: imx: imx8mp: Disable PCI support on DH i.MX8MP DHCOM SoM on DRC02 board

The DRC02 carrier board does not expose PCIe in any way, disable PCIe support.

Signed-off-by: Marek Vasut <marex@denx.de>
2 months agoarm64: imx: imx8mp: Enable DM regulator on DH i.MX8MP DHCOM SoM on DRC02 board
Marek Vasut [Fri, 25 Oct 2024 22:55:02 +0000 (00:55 +0200)]
arm64: imx: imx8mp: Enable DM regulator on DH i.MX8MP DHCOM SoM on DRC02 board

Make sure DM regulator support is enabled on this board, just like on all
the other DH i.MX8MP DHCOM SoM based boards.

Signed-off-by: Marek Vasut <marex@denx.de>
2 months agoMerge patch series "Allow showing the memory map"
Tom Rini [Fri, 25 Oct 2024 20:22:36 +0000 (14:22 -0600)]
Merge patch series "Allow showing the memory map"

Simon Glass <sjg@chromium.org> says:

This little series adds a new 'memmap' command, intended to show the
layout of memory within U-Boot and how much memory is available for
loading images.

Link: https://lore.kernel.org/r/20241021081934.289473-1-sjg@chromium.org
2 months agomeminfo: Show the lmb records
Simon Glass [Mon, 21 Oct 2024 08:19:32 +0000 (10:19 +0200)]
meminfo: Show the lmb records

Add the lmb records onto the end of the memory map.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 months agolmb: Export the lmb data structure
Simon Glass [Mon, 21 Oct 2024 08:19:31 +0000 (10:19 +0200)]
lmb: Export the lmb data structure

Provide a way to access this data structure so that the meminfo command
can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 months agocmd: Update the meminfo command to show the memory map
Simon Glass [Mon, 21 Oct 2024 08:19:30 +0000 (10:19 +0200)]
cmd: Update the meminfo command to show the memory map

U-Boot has a fairly rigid memory map which is normally not visible
unless debugging is enabled in board_f.c

Update the 'meminfo' command to show it. This command does not cover
arch-specific pieces but gives a good overview of where things are.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 months agocmd: Move meminfo command into its own file
Simon Glass [Mon, 21 Oct 2024 08:19:29 +0000 (10:19 +0200)]
cmd: Move meminfo command into its own file

In preparation for expanding this command, move it into a separate file.
Rename the function to remove the extra underscore. Update the number of
arguments to 1, since 3 is incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 months agobootstage: Allow counting memory without strings
Simon Glass [Mon, 21 Oct 2024 08:19:28 +0000 (10:19 +0200)]
bootstage: Allow counting memory without strings

The bootstage array includes pointers to strings but not the strings
themselves. The strings are added when stashing, but including them in
the size calculation gives an inflated view of the amount of space used
by the array.

Update this function so it can return the amount of memory used by the
bootstage structures themselves, without the strings which they point
to.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 months agoglobal_data: Add some more accessors
Simon Glass [Mon, 21 Oct 2024 08:19:27 +0000 (10:19 +0200)]
global_data: Add some more accessors

Add accessors for bloblist, bootstage, trace and video to avoid needing
more #ifdefs in the C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 months agocommon: Tidy up how malloc() is inited
Simon Glass [Mon, 21 Oct 2024 08:19:26 +0000 (10:19 +0200)]
common: Tidy up how malloc() is inited

The call to malloc() is a bit strange. The naming of the arguments
suggests that an address is passed, but in fact it is a pointer, at
least in the board_init_r() function and SPL equivalent.

Update it to work as described. Add a function comment as well.

Note that this does adjustment does not extend into the malloc()
implementation itself, apart from changing mem_malloc_init(), since
there are lots of casts and pointers and integers are used
interchangeably.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 months agocommon: Fix up malloc() comment in reserve_noncached()
Simon Glass [Mon, 21 Oct 2024 08:19:25 +0000 (10:19 +0200)]
common: Fix up malloc() comment in reserve_noncached()

The function name has changed, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 months agoMerge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians...
Tom Rini [Fri, 25 Oct 2024 17:55:23 +0000 (11:55 -0600)]
Merge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc1 v2

.mailmap:
- Switch Padmarao's email to AMD one

zynq_spi:
- Make update_stripe static

xilinx:
- Update DT description for EMMCs

zynqmp:
- Update logic around RPUs and tcm handling
- Update bootmenu selection for Kria
- Add description for SC vm-p-b1369
- Fix comment about file location in zynqmp-p-a2197-00-revA.dts

versal:
- Fix logic around USB boot

versal2:
- Disable useless features for Mini configurations

versal-net:
- Get rid of current-speed DT property from mini configuration

microblaze:
- Fix scriptaddr location

# -----BEGIN PGP SIGNATURE-----
#
# iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
# IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
# =4gY0
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 25 Oct 2024 08:51:36 AM CST
# gpg:                using DSA key 1B3CD4CCBD79989413D1C31ECA4965CB294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (AMD) <michal.simek@amd.com>" [unknown]

2 months agoMerge tag 'u-boot-dfu-20241025' of https://source.denx.de/u-boot/custodians/u-boot-dfu
Tom Rini [Fri, 25 Oct 2024 14:35:56 +0000 (08:35 -0600)]
Merge tag 'u-boot-dfu-20241025' of https://source.denx.de/u-boot/custodians/u-boot-dfu

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/22962

Dfu:
- Rely on device tree for spi speed/mode on spi flash

Android Image:
- Fix booting on platforms having > 4GiB of memory
- Decompress boot image to kernel_addr_r when compression is enabled
- Honor CONFIG_SYS_LOAD_ADDR when mkbootimg uses default address

Bcb:
- Rework bcb command to use U_BOOT_LONGHELP
- Move ab_select cmd to bcb cmd
- Implement ab_dump command in bcb
- bcb: Write '_<slot>' instead of '<slot>' to misc partition

2 months ago.mailmap: update e-mail address for Padmarao Begari
Padmarao Begari [Wed, 23 Oct 2024 08:51:27 +0000 (14:21 +0530)]
.mailmap: update e-mail address for Padmarao Begari

Update e-mail address.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241023085127.3450680-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agospi: zynq_qspi: Add missing prototype for update_stripe
Venkatesh Yadav Abbarapu [Wed, 16 Oct 2024 04:44:02 +0000 (10:14 +0530)]
spi: zynq_qspi: Add missing prototype for update_stripe

Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'update_stripe'
[-Wmissing-prototypes].

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241016044402.18052-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agoboard: rockchip: Add Hardkernel ODROID-M1S
Jonas Karlman [Tue, 8 Oct 2024 20:06:35 +0000 (20:06 +0000)]
board: rockchip: Add Hardkernel ODROID-M1S

The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Features tested on a ODROID-M1S 8GB rev1.0 20230906:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: Add Hardkernel ODROID-M1S
Jonas Karlman [Tue, 8 Oct 2024 20:06:34 +0000 (20:06 +0000)]
arm64: dts: rockchip: Add Hardkernel ODROID-M1S

The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 10dc64fe0f980c47c7e747885ddf7a8c12780337 ]

(cherry picked from commit f811548e758b52896f725753086c42b49dc42c0d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1
Jonas Karlman [Tue, 8 Oct 2024 20:06:33 +0000 (20:06 +0000)]
arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1

The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: fd3583267703 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 735065e774dcfc62e38df01a535862138b6c92ed ]

(cherry picked from commit e7259a2c4a6f2ebdfc96b8bbffc77fe67604b11f)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: Migrate to use USB_DWC3_GENERIC on RK3328
Jonas Karlman [Tue, 8 Oct 2024 19:27:16 +0000 (19:27 +0000)]
rockchip: Migrate to use USB_DWC3_GENERIC on RK3328

After the full convertion of usb gadget interrupt handling to
usb_gadget_generic_ops, it is now possible to use DM_USB_GADGET,
DWC2_OTG and DWC3_GENERIC together without causing a build error.

Change to use USB_DWC3_GENERIC instead of USB_XHCI_DWC3 to complte the
migration initiated in commit 1bc4e8eb1d7f ("rockchip: Migrate to use
DM_USB_GADGET on RK3328"). No functional change is intended.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoboard: rockchip: Add Hardkernel ODROID-M2
Jonas Karlman [Thu, 3 Oct 2024 19:59:34 +0000 (19:59 +0000)]
board: rockchip: Add Hardkernel ODROID-M2

The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Features tested on a ODROID-M2 16GB rev1.0 20240611:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm64: dts: rockchip: Add Hardkernel ODROID-M2
Jonas Karlman [Thu, 3 Oct 2024 19:59:33 +0000 (19:59 +0000)]
arm64: dts: rockchip: Add Hardkernel ODROID-M2

The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Add initial support for eMMC, SD-card, Ethernet, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240901112020.3224704-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: ce48b8c976ce439c336def6e06bf8224a8ff9125 ]

(cherry picked from commit 7ba62d8b4cb010c6fcb7077550b46d5f5fb5af6d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: rk3399: Weaken dependency on SPL serial
Daniel Semkowicz [Fri, 20 Sep 2024 09:06:01 +0000 (11:06 +0200)]
rockchip: rk3399: Weaken dependency on SPL serial

Allow to disable serial console in SPL. Weak dependency is already used
with TPL serial.

Signed-off-by: Daniel Semkowicz <dse@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoboard: rockchip: Enable PD_VO before driver access
Chris Morgan [Thu, 19 Sep 2024 14:00:22 +0000 (09:00 -0500)]
board: rockchip: Enable PD_VO before driver access

Enable the PD_VO power domain before driver access on the rk3568 SoC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoboard: rockchip: Remove ARM SCMI Support from RGxx3
Chris Morgan [Thu, 19 Sep 2024 14:00:21 +0000 (09:00 -0500)]
board: rockchip: Remove ARM SCMI Support from RGxx3

Remove config options for ARM SCMI. It is not required to boot the
board and when using the most recent mainline A-TF it actually causes
the device to freeze during boot due to missing SCMI support.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoboard: rockchip: Add vdd_cpu reg fixup for RGXX3 Series
Chris Morgan [Thu, 19 Sep 2024 14:00:20 +0000 (09:00 -0500)]
board: rockchip: Add vdd_cpu reg fixup for RGXX3 Series

Some of the Powkiddy devices switched to using a different vendor for
the vdd_cpu regulator. Unfortunately the device does not have a new
revision to denote this, so users have no way of knowing in advance.

Add code to detect if a device is present at addresses 0x1c or 0x40 on
the i2c0 bus and update the devicetree if needed.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoboard: rockchip: Convert Anbernic RGxx3 to OF_UPSTREAM
Chris Morgan [Thu, 19 Sep 2024 14:00:19 +0000 (09:00 -0500)]
board: rockchip: Convert Anbernic RGxx3 to OF_UPSTREAM

Refactor the board detection logic (again) to make it compatible with
the upstream device-trees, and switch to OF_UPSTREAM.

Now the device boots with the device-tree for the 353P, and then
loads the correct device tree (of 10) in the later stages of SPL.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agorockchip: px30: clk: add UART0 clock getter/setter
Lukasz Czechowski [Thu, 22 Aug 2024 10:33:15 +0000 (12:33 +0200)]
rockchip: px30: clk: add UART0 clock getter/setter

Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 clocks, and thus
it fixes the issues with UART0 not working in case DEBUG_UART is
disabled.
Unlike other Rockchip SoCs, i.e. rk3399, in the PX30 the default
clock source for UART is GPLL, instead of external oscillator.
If the DEBUG_UART is enabled, the clock source is changed in
board_debug_uart_init function to 24Mhz oscillator, which also
matches the fallback value obtained from DT node.
In case the DEBUG_UART is disabled, the UART clock source remains
default, and the DM serial driver wrongly configures the baud rate,
resulting in broken communication.
By implementing the UART clock getter/setter, the serial driver
can probe the actual configuration and corectly configure itself.
The DEBUG_UART settings now should not affect it.

The driver supports GPLL and 24M oscillator. NPLL and USBPHY480M
sources, that are managed by CRU, are not yet handled, as likely
they won't be used in real scenarios.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm: dts: rockchip: turn LEDs on at boot for Radxa boards
FUKAUMI Naoki [Thu, 8 Aug 2024 22:23:25 +0000 (07:23 +0900)]
arm: dts: rockchip: turn LEDs on at boot for Radxa boards

Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
add `default-state = "on"` to u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoconfigs: rockchip: enable gpio-leds driver for Radxa boards
FUKAUMI Naoki [Thu, 8 Aug 2024 22:23:24 +0000 (07:23 +0900)]
configs: rockchip: enable gpio-leds driver for Radxa boards

Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
enable gpio-leds driver and led command.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoarm: dts: rockchip: fix dts for Radxa ROCK 4C+
FUKAUMI Naoki [Thu, 15 Aug 2024 22:37:13 +0000 (07:37 +0900)]
arm: dts: rockchip: fix dts for Radxa ROCK 4C+

ROCK Pi 4 series and ROCK 4C+ cannot share .dtsi file because 4C+ is
different board.

add rk3399-rock-pi-4-u-boot.dtsi contents and remove dependency of it.

no functional change is intended.

Fixes: 71a95e2efd30 ("arm: dts: rockchip: add Radxa ROCK 4C+")
Suggested-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 months agoamd: Disable LMB, BOOTM, MTD and EFI loader for mini configurations
Michal Simek [Mon, 7 Oct 2024 07:30:08 +0000 (09:30 +0200)]
amd: Disable LMB, BOOTM, MTD and EFI loader for mini configurations

Mini configurations don't need these features that's why disable them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6a263cf5f6b7c7f8e0bfc11649887f2760385d0e.1728286203.git.michal.simek@amd.com
2 months agoarm64: zynqmp: fix tcm initialization for mini u-boot
Padmarao Begari [Fri, 11 Oct 2024 11:34:35 +0000 (17:04 +0530)]
arm64: zynqmp: fix tcm initialization for mini u-boot

Fix the issue introduced by commit fed064477c2c
("arm64: zynqmp: Print an error for split to lock mode switch").
The mini u-boot is hanging, because of the tcm is not initialized.
The mini u-boot is using the tcm to reserve the mmu table and
currently it is not initialized, so allowing u-boot to initialize
the tcm.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241011113435.1966604-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agoarm64: xilinx: Fix file location described in zynqmp-p-a2197-00-revA.dts
Michal Simek [Wed, 25 Sep 2024 07:02:07 +0000 (09:02 +0200)]
arm64: xilinx: Fix file location described in zynqmp-p-a2197-00-revA.dts

Fix pointers to incorrect file name described in DT.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202409250603.7achimjs-lkp@intel.com/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e6017ad613d452d16ce0f7fba8a6ce32b174413.1727247725.git.michal.simek@amd.com
2 months agoarm64: versal-net: Remove current-speed from mini
Michal Simek [Wed, 25 Sep 2024 07:03:59 +0000 (09:03 +0200)]
arm64: versal-net: Remove current-speed from mini

U-Boot code is not reading this variable that's why remove it from DT.
PL011 code is automatically using CONFIG_BAUDRATE instead.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3de28cc8bbf9571d24673a60809c2075fe2f44c3.1727247837.git.michal.simek@amd.com
2 months agoarm64: zynqmp: Add description for SC on vm-p-m1369 board
Michal Simek [Wed, 25 Sep 2024 07:03:38 +0000 (09:03 +0200)]
arm64: zynqmp: Add description for SC on vm-p-m1369 board

Board is very similar to vn-p-b2197 with subset of functinality.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fbc6d56c4aaa33113e35a53520320f4050ed141e.1727247815.git.michal.simek@amd.com
2 months agoxilinx: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC
Paul Alvin [Wed, 25 Sep 2024 07:03:13 +0000 (09:03 +0200)]
xilinx: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC

Add "cap-mmc-hw-reset" property to the eMMC DT node to perform the
eMMC device hardware reset.
Also, add "no-sd", "no-sdio" properties to eMMC DT node to skip
unwanted sd, sdio related commands during initialization for eMMC
device as this may lead to unnecessary register dump.

Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b31554816a3378365143e9f5c266f6386af0a438.1727247785.git.michal.simek@amd.com
2 months agoxilinx: zynqmp: Remove conditional check for bootmenu_default variable
John Vicky Vykuntapu [Wed, 2 Oct 2024 11:15:17 +0000 (13:15 +0200)]
xilinx: zynqmp: Remove conditional check for bootmenu_default variable

As per bootmenu support added default boot options to CC on AMD CCs and
default to SOM on others.
However, if no secondary boot device is enabled in the design,it should
be the default boot option for SOM when combined with AMD CCs because it
only contains SOM peripherals.
To address this issue, The conditional check for the bootmenu_default
variable was removed, and it has always been set to SOM as the default
boot option.
In this way, users can choose preferred boot options from the bootmenu
based on the boot devices configured in the design for AMD CCs.

Fixes: 61bf0fa8663d ("xilinx: zynqmp: Add bootmenu support")
Signed-off-by: John Vicky Vykuntapu <johnvicky.vykuntapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0e30b44ce3b478fdec21edad8d896f4d438ce331.1727867715.git.michal.simek@amd.com
2 months agoxilinx: common: fix script address for Microblaze
Padmarao Begari [Tue, 1 Oct 2024 08:25:37 +0000 (13:55 +0530)]
xilinx: common: fix script address for Microblaze

Fix the issue introduced by commit 067e0294806e
("board: xilinx: Remove conditional check for Microblaze").
The scriptaddr should be physical location not really offset
from start of DDR. When U-Boot is not found boot.scr script
address in device tree, then it is assigned  based on script
address  and ram base address for Microblaze and i.e exceeding
DDR memory. To fix this, the script address is assigned
initially with offset instead of address. Later it is added
with ram base address and gets the physical address.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241001082537.830286-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agoarm64: versal: Wire USB0 in distro boot
Michal Simek [Mon, 30 Sep 2024 11:03:53 +0000 (13:03 +0200)]
arm64: versal: Wire USB0 in distro boot

For unknown reason USB host hasn't been described for distro boot that's
why wire it now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9715605c232ce38a36a200204c14208b9d76cd83.1727694230.git.michal.simek@amd.com
2 months agoarm64: versal: Remove description for USB1
Michal Simek [Mon, 30 Sep 2024 11:03:52 +0000 (13:03 +0200)]
arm64: versal: Remove description for USB1

There is only one USB controller that's why remove description for USB1.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f148161ee489d19d708df1b4fa7477821e06bb55.1727694230.git.michal.simek@amd.com
2 months agoarm64: zynqmp: Fix tcminit mode value based on argv
Padmarao Begari [Mon, 30 Sep 2024 04:38:14 +0000 (10:08 +0530)]
arm64: zynqmp: Fix tcminit mode value based on argv

The RPU pytest introduced by commit e894c10c040b
("test/py: zynqmp_rpu: Add test for loading RPU apps") expects
3rd parameter as string not a number that's why extend command
to actually handle both. The issue with existing code is that
when any non number string is passed hextoul returns 0. For
backward compatibility zynqmp tcminit 0/1 can be still used but
it is recommended to use strings instead.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20240930043814.530181-3-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agoarm64: zynqmp: Print an error for split to lock mode switch
Padmarao Begari [Mon, 30 Sep 2024 04:38:13 +0000 (10:08 +0530)]
arm64: zynqmp: Print an error for split to lock mode switch

The zynqmp tcminit crashes the U-Boot when switching from
r5-mode "split" to "lockstep" instead it should throw an error.
When cpu is enabled, the check_tcm_mode() function checks
if the previous mode is "split", switch mode is "lockstep" then
it returns the error code and the initialize_tcm() function is not
updating the global control register of the RPU instead it prints
the error message. When cpu is disabled, the check_tcm_mode()
function returns the success code for switch split to lockstep mode.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20240930043814.530181-2-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 months agoimx8m: set sane default value for SPL_LOAD_FIT_ADDRESS
Rasmus Villemoes [Thu, 24 Oct 2024 10:01:45 +0000 (12:01 +0200)]
imx8m: set sane default value for SPL_LOAD_FIT_ADDRESS

I enabled IMX_HAB on an imx8mp board, but even though I knew about the
implementation, I forgot that I had to provide a sane value for
SPL_LOAD_FIT_ADDRESS. The help text for IMX_HAB doesn't mention this
implicit requirement, and there's no build-time warning; the default
0x0 value just ends up being returned from
board_spl_fit_buffer_addr(), obviously resulting in a non-booting
board.

The existing imx8m* board configs that set a non-zero value currently
all use 0x44000000. The actual value doesn't matter too much, but 0 is
always wrong for imx8m platforms. So just use 0x44000000 as default
for those platforms.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
2 months agommc: fsl_esdhc: Convert to use livetree API for fdt access
Tim Harvey [Wed, 23 Oct 2024 20:28:55 +0000 (13:28 -0700)]
mmc: fsl_esdhc: Convert to use livetree API for fdt access

Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the fsl_esdhc_imx
driver will fail to read vendor-specific properties from the dt.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 months agoi2c: mxc_i2c: Convert to use livetree API for fdt access
Tim Harvey [Wed, 23 Oct 2024 20:28:54 +0000 (13:28 -0700)]
i2c: mxc_i2c: Convert to use livetree API for fdt access

Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the mxc-i2c
driver will fail to support scl-gpios and sda-gpios for
i2c bus recovery.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 months agoimx: power-domain: Convert to use livetree API for fdt access
Tim Harvey [Wed, 23 Oct 2024 20:28:53 +0000 (13:28 -0700)]
imx: power-domain: Convert to use livetree API for fdt access

Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the imx8m-power-domain
driver will (silently) fail to probe its children leaving you with
no power domain support causing issues with certain devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 months agopinctrl: imx: Convert to use livetree API for fdt access
Tim Harvey [Wed, 23 Oct 2024 20:28:52 +0000 (13:28 -0700)]
pinctrl: imx: Convert to use livetree API for fdt access

Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the imx8mq-pinctrl
driver will (silently) fail to probe causing issues with multiple
devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 months agoverdin-imx8m{m|p}: defconfig: update fastboot buffer size/address
Hiago De Franco [Wed, 23 Oct 2024 11:53:50 +0000 (08:53 -0300)]
verdin-imx8m{m|p}: defconfig: update fastboot buffer size/address

Remove FASTBOOT_BUF_SIZE from verdin-imx8mm_defconfig and
verdin-imx8mp_defconfig to use the default value of 0x7000000, aligning
with other Toradex boards.

Update FASTBOOT_BUF_ADDR to 0x44200000, consistent with the value in
previous downstream NXP U-Boot releases. This will make fastboot
applications continue working with upstream U-Boot by using the same
address.

Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2 months agoimx: Support i.MX93 9X9 QSB board
Peng Fan [Wed, 23 Oct 2024 04:03:17 +0000 (12:03 +0800)]
imx: Support i.MX93 9X9 QSB board

Add i.MX93 9x9 Quick Start Board support.
 - Two ddr scripts included w/o inline ecc feature.
 - SDHC/NETWORK/I2C/UART supported
 - PCA9450 supported, default over drive mode
 - Documentation added.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 months agoimx9: clock: Add 800MHz fracpll entry
Peng Fan [Wed, 23 Oct 2024 04:03:16 +0000 (12:03 +0800)]
imx9: clock: Add 800MHz fracpll entry

Add 800MHz fracpll entry to support DDR 3200MTS.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 months agoarm: dts: imx8qm-mek: fix boot
Peng Fan [Sat, 19 Oct 2024 00:51:25 +0000 (08:51 +0800)]
arm: dts: imx8qm-mek: fix boot

serial_init runs into panic because no serial device found.
Update the device tree to include bootph-some-ram for some critial
devices needed in pre-reloc stage

Also update usdhc related properties to avoid card initialization
failure.

Fixes: 8c103c33fb1 ("dm: dts: Convert driver model tags to use new schema")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 months agoarm: dts: imx8qxp-mek: fix boot
Peng Fan [Sat, 19 Oct 2024 00:51:24 +0000 (08:51 +0800)]
arm: dts: imx8qxp-mek: fix boot

serial_init runs into panic because no serial device found.
Update the device tree to include bootph-some-ram for some critial
devices needed in pre-reloc tage

Fixes: 8c103c33fb1 ("dm: dts: Convert driver model tags to use new schema")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 months agomx6ul_14x14_evk: Convert to watchdog driver model
Fabio Estevam [Fri, 18 Oct 2024 17:55:49 +0000 (14:55 -0300)]
mx6ul_14x14_evk: Convert to watchdog driver model

Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.

Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 months agomx6ul_14x14_evk: Remove unneeded USB board code
Fabio Estevam [Fri, 18 Oct 2024 17:55:48 +0000 (14:55 -0300)]
mx6ul_14x14_evk: Remove unneeded USB board code

With CONFIG_DM_USB, there is no longer the need for any USB board code
anymore.

Remove the unneeded USB board code.

While at it, also remove the uneeeded CONFIG_USB_MAX_CONTROLLER_COUNT
option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>