Rasmus Villemoes [Thu, 30 Jan 2020 12:06:45 +0000 (12:06 +0000)]
mmc: fsl_esdhc: actually enable cache snooping on mpc830x
The reference manuals for MPC8308 and MPC8309 both say that the
esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the
System configuration registers. Unfortunately, that doesn't mean that
the registers are just mirrors of each other - any write to esdhcctl
is simply ignored. So to actually enable cache snooping, we
unfortunately have to add a little ifdeffery.
There is, naturally, no description of the bit fields of esdhcctl in
the MPC8309 manual, but comparing the description of esdhcctl from the
LS1021A reference manual to the description of the sdhccr in MPC8309,
one also finds that the fields are bit-reversed, so the bit to set is
0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
uses in the two gdsys/mpc8308/ boards.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>
Masahiro Yamada [Thu, 23 Jan 2020 05:31:12 +0000 (14:31 +0900)]
mmc: check the return value of mmc_select_mode_and_width()
Since commit 01298da31d92 ("mmc: Change mode when switching to a boot
partition"), errors in mmc_select_mode_and_width() are ignored.
The return value should be checked.
Fixes: 01298da31d92 ("mmc: Change mode when switching to a boot partition") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Masahiro Yamada [Tue, 21 Jan 2020 09:42:05 +0000 (18:42 +0900)]
mmc: sdhci-cadence: send tune request twice to work around errata
Cadence sent out an errata report to their customers of this IP.
This errata is not so severe, but the tune request should be sent
twice to avoid the potential issue.
Quote from the report:
Problem Summary
---------------
The IP6116 SD/eMMC PHY design has a timing issue on receive data path.
This issue may lead to an incorrect values of read/write pointers of
the synchronization FIFO. Such a situation can happen at the SDR104
and HS200 tuning procedure when the PHY is requested to change a phase
of sampling clock when moving to the next tuning iteration.
Workarounds
-----------
The following are valid workarounds to resolve the issue:
1. In eMMC mode, software sends tune request twice instead of once at
each iteration. This means that the clock phase is not changed on
the second request so there is no potential for clock instability.
2. In SD mode, software must not use the hardware tuning and instead
perform an almost identical procedure to eMMC, using the HRS34 Tune
Force register.
Tom Rini [Fri, 14 Feb 2020 12:31:47 +0000 (07:31 -0500)]
Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- add DH Electronics DHCOM SoM and PDK2 board
- DT alignment with kernel v5.5-rc7 for stm32mp1 boards
- fix STM32 image format for big endian hosts in mkimage
- solve warnings in device tree and code for stm32mp1 boards
- remove fdt_high and initrd_high for stm32 and stih boards
- add support of STM32MP15x Rev.Z
- update stm32mp1 readme
Patrice Chotard [Mon, 3 Feb 2020 14:10:40 +0000 (15:10 +0100)]
board: stm32: remove fdt_high and fdt_highinitrd_high
For stm32 f4, f7 and h7 boards, remove fdt_high and
initrd_high as they shouldn't be used, this allows the fdt
and initrd relocation.
This implies to set CONFIG_SYS_BOOTMAPSZ to indicate the
amount of memory available to contain kernel, device tree
and initrd for relocation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Patrice Chotard [Mon, 3 Feb 2020 14:00:59 +0000 (15:00 +0100)]
board: stih410-b2260: remove fdt_high and initrd_high
Remove fdt_high and initrd_high as they shouldn't be used,
this allows the fdt and initrd relocation.
This implies to set CONFIG_SYS_BOOTMAPSZ to indicate the
amount of memory available to contain kernel, device tree
and initrd for relocation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 10 Feb 2020 10:54:11 +0000 (11:54 +0100)]
stm32mp1: remove fdt_high and initrd_high in environment
Remove fdt_high and initrd_high (set to 0xffffffff) in stm32mp1 board
enviromnent, and U-Boot always relocate FDT and initrd in bootm command.
This relocation is limited by CONFIG_SYS_BOOTMAPSZ which indicates
the size of the memory region where it is safe to place data passed
to the Linux kernel (DTB, initrd), it is
a) Less than or equal to RAM size.
b) not within the kernel's highmem region
So 256M seems large enough in most circumstances and users
can override this value via environment variable "bootm_mapsize"
if needed.
This modification increases the boot time but avoid assumption
on aligned address for bootm command.
A user can still define this variables themselves if the FDT or
initrd is either left in-place or copied to a specific location.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Tue, 28 Jan 2020 09:44:15 +0000 (10:44 +0100)]
clk: stm32mp1: solve type issue in stm32mp1_lse_enable and stm32mp1_clktree
Solve type issue in stm32mp1_lse_enable and stm32mp1_clktree.
This patch solves the warnings when compiling with W=1
on stm32mp1 board:
clk_stm32mp1.c: In function ‘stm32mp1_lse_enable’:
clk_stm32mp1.c:1238:15: warning: comparison of integer expressions
of different signedness: ‘u32’ {aka ‘unsigned int’} and ‘int’
[-Wsign-compare]
clk_stm32mp1.c:1239:13: warning: comparison of integer expressions
of different signedness: ‘u32’ {aka ‘unsigned int’} and ‘int’
[-Wsign-compare]
clk_stm32mp1.c: In function ‘stm32mp1_clktree’:
clk_stm32mp1.c:1814:17: warning: comparison of integer expressions
of different signedness: ‘int’ and ‘unsigned int’
[-Wsign-compare]
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Antonio Borneo [Tue, 28 Jan 2020 14:42:13 +0000 (15:42 +0100)]
tools: mkimage: fix STM32 image format for big endian hosts
Two header fields are not properly converted to little endian
before assignment, resulting in incorrect header while executing
mkimage on big endian hosts.
Convert the value of the header fields image_checksum and
edcsa_algorithm to little endian before the assignment.
Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 28 Jan 2020 09:11:04 +0000 (10:11 +0100)]
board: stm32mp1: update readme
Update readme:
- list the supported SOC and change family to STM32MP15x
- add warning on OTP write and prerequisite:
check if MAC address is not yet provisioned.
- Use filesize for mmc write command (avoid to write all partition
with ${partsize}). ${filesize} and ${partsize} are set by previous
load command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Tue, 28 Jan 2020 09:11:03 +0000 (10:11 +0100)]
ARM: dts: stm32m1: add reg for pll nodes
Fix the following DT dtc warnings for stm32mp1 boards:
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3:
node has a unit name, but no reg property
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Antonio Borneo [Tue, 28 Jan 2020 09:11:01 +0000 (10:11 +0100)]
ARM: dts: stm32mp1: move FDCAN to PLL4_R
LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
cache the value at probe and pretend to use it later.
Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.
Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Tue, 28 Jan 2020 09:10:59 +0000 (10:10 +0100)]
stm32mp1: pwr: use the last binding for pwr
Update the driver to use the latest binding from kernel v5.5-rc1:
no more use syscon or regmap to access to pwr register and
only one pwr_regulators node with the compatibility "st,stm32mp1,pwr-reg"
is available.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
arm: K3: j721e: Fix boot parameter table index memory address
The boot parameter table index memory address for J721E was configured
to an incorrect value which prevented the use of this definition to
determine which boot parameter table is active which is needed to be
able to distinguish between primary and backup boot modes. Fix this
issue by updating the value to the correct one also in alignment with
the J721E Technical Reference Manual (TRM).
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tero Kristo [Tue, 11 Feb 2020 03:55:52 +0000 (09:25 +0530)]
ARM: keystone2: enable initrd fixup for LPAE addressing
Keystone2 u-boot loads the initrd image into non-LPAE addressed memory
but linux kernel is running in LPAE. This causes a conflict as kernel
detects that non-memory address is passed and kernel ignores initrd.
There is an existing fixup logic to modify the address in the proper
configuration, but this is disabled at the moment. Enable the fixup
by setting the env variable for this so that initrd can be used
properly.
Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Roger Quadros [Mon, 10 Feb 2020 09:59:24 +0000 (11:59 +0200)]
board: ti: am57xx-idk: Prevent boot for invalid configuation
On am571x-idk there can be following configurations based on Jumper J51
and LCD panel detected.
1) J51 removed (6port): 6 port Ethernet. Disable LCD panel.
2) J51 placed (LCD) + Panel detected: 4 port Ethernet with appropriate LCD.
3) J51 placed (LCD) + Panel not detected/not supported.
Configuration 3 is considered invalid as we can't use display nor ICSS1
ethernet ports due to hardware muxing. Alert the user to fix the
configuration and prevent boot.
Alternative was to allow boot and limit to 4 port Ethernet with no display
but this involved introduction of another DTB for the kernel and was
considered not worth the hassle.
Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 3 Feb 2020 13:46:53 +0000 (19:16 +0530)]
arm: dts: k3-j721e-r5-common-proc-board: Disable power-domains for mcu uart
mcu uart will be used during uart boot for loading sysfw.itb. Since
sysfw is not yet available during uart load, power-domain cannot be
enabled. We need to rely on ROM for doing that, so disable power-domains
and clocks for mcu uart. Also fix the mcu uart frequency.
Tom Rini [Tue, 11 Feb 2020 17:41:14 +0000 (12:41 -0500)]
travis/gitlab/azure: Ensure we use python3 always
When running our tests there are some cases where as part of the Python
2.7 to Python 3.6 migration we didn't force Python 3.6 to be used as
everything wasn't yet migrated. Now that everything is, make sure to
tell virtualenv to use python3. In the case of Travis this is best done
by making the tools test happen after the main tests so that it will
already have been run in all cases, TEST_PY_TOOLS is a subset of
TEST_PY_BD.
Ovidiu Panait [Wed, 5 Feb 2020 06:54:42 +0000 (08:54 +0200)]
board_f: Make clear_bss generic
clear_bss is already used by 3 arches (x86, arc, xtensa), so make it generic
and provide a weak nop stub for it. This also removes arch-specific ifdef
duplications around clear_bss.
common/console.c: In function ‘console_record_reset’:
common/console.c:615:16: error: passing argument 1 of ‘membuff_purge’
discards ‘volatile’ qualifier from pointer target type
[-Werror=discarded-qualifiers]
615 | membuff_purge(&gd->console_out);
| ^~~~~~~~~~~~~~~~
by casting to non-volatile.
The volatile property stems from declarations like
arch/arm/include/asm/global_data.h:114:
But there is no need to treat gd->console_out and gd->console_in as
volatile in the context of common/console.c.
Fixes: b612312816ff ("console: Add a function to read a line of the output / eof") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Thu, 6 Feb 2020 16:12:59 +0000 (17:12 +0100)]
test: aes: fix memleak
In the first version, the result of malloc is checked
with ut_assertnonnull. But on a fail, this macro exit
the function, so previously malloc are not freed.
So to avoid a memleak, we don't use ut_assertnonnull,
but simply check the return of malloc. If one has failed,
we freed all the allocated memory and quit the function.
Tom Rini [Wed, 12 Feb 2020 22:20:25 +0000 (17:20 -0500)]
Merge tag 'arc-fixes-for-2020.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
As usual a bit late a couple of tiny fixes and improvements for ARC.
1. Switch from ARC UART to a convenient DW UART on ARC
simulation platforms. This became avaialble when nSIM got support
of that much more standard UART (starting from nSIM v2019.06).
FWIW also available now in Free nSIM [1].
This among other things allows us finally to use the same one binary
on all our simulators & FPGA-based emulators.
2. Disable networking support on simulated platforms as there's no
network interface in them.
3. Add Virtio net & block devices for the configuration supported
by QEMU so that we may leverage those virtual peripherals and
in fact it's possible to load uImage from TFTP server and bootm it.
4. Minor fixes for HSDK clocks.
5. Rework of how we chose and use compiler options for ARC-based boards.
In real world ARC-based designs are customized more or less but very
rarely match any of our "templates" thus it makes not much sense to
pretend we have some fixed configs, instead we now will fully reply
on a SoC or even board on getting precise set of compiler options
preferably even extracted from real HW via "tcfgen" utility.
6. Well and finally yet another simplification - switch to generic
written in C accessors which are much more universal and just work
for any target supported by the complier as compared to GAS
implementation which is much more target-dependent.
This one was heavily "inspired" by similar implementation for RISCV
and ARM.
Marek Vasut [Fri, 24 Jan 2020 17:39:16 +0000 (18:39 +0100)]
ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 board
Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. This is an SoM with STM32MP15xx and an evaluation kit. The
baseboard provides Ethernet, UART, USB, CAN and optional display.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Alexey Brodkin [Mon, 20 Jan 2020 10:37:38 +0000 (13:37 +0300)]
ARC: Switch to generic accessors
First of all U-Boot is not that performance oriented as real run-time
software like OS or user bare-metal app so we may afford being not super
fast as we only being executed once. That in return allows us to be more
universal and support wider variety of devices.
And looking forward that will significantly reduce maintenance and simplify
support of newer architectures.
And while at it we add quad-word accessors like readq(), writeq() etc.
Eugeniy Paltsev [Wed, 12 Feb 2020 11:23:54 +0000 (14:23 +0300)]
ARC: rework setting of ARC CPU specific compiler options
It's a very rare if at all existing occasion when ARC CPU template
is used as is w/o any changes - in the end it's a beauty and competitive
advantage of ARC cores to be tailored for a particular use-case - and
so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
Given for each and every platform we end-up adding quite a few more flags
it's logical to move "-mcpu" selection to platform's definition as well
which we exactly do here.
Alexey Brodkin [Thu, 26 Dec 2019 11:47:42 +0000 (14:47 +0300)]
ARC: nsim_hs38: Add support of Virtio NET & BLK
Given now nsim_hs38 configuration is usable on QEMU and in QEMU
we have Virtio working perfectly fine the next logical step
is to add support of supported & known to work net & bkl to this
config.
Alexey Brodkin [Thu, 26 Dec 2019 10:46:27 +0000 (13:46 +0300)]
ARC: nSIM: switch from ARC UART to DW UART
Since v2019.06 DesingWare nSIM supports DesignWare UART simulation
and so we may switch from pretty unusual ARC UART to much more standard
DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART).
This among other things makes built dinaries compatible with our other
platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU.
Lukasz Majewski [Sat, 25 Jan 2020 08:00:58 +0000 (09:00 +0100)]
regulator: fix: Move code to enable gpio regulator to pre_probe from ofdata_to_platdata
The commit e8e9715df2d4 ("regulator: fixed: Modify enable-active-high behavior")
fixed the regulator driver behavior when 'enable-active-high' is defined.
Unfortunately, this patch used dm_regulator_platdata()'s "boot_on" member
to set GPIOD_IS_OUT_ACTIVE flag and enable the regulator.
The issue here is that regulator_common_ofdata_to_platdata() is called
_before_ regulator_pre_probe() function in which the 'regulator-boot-on'
property is asserted.
As a result the GPIOD_IS_OUT_ACTIVE flag is not set and gpio_request_by_name()
called in the former function is not enabling the regulator.
This is problematic for e.g. i.MX ethernet driver, which then tries to
perform initialization without power (and fails).
The solution here is to explicitly enable regulator in regulator_pre_probe()
callback only when 'regulator-boot-on' property is present in device tree.
The GPIOD_IS_OUT_ACTIVE flag is not set at all, but relevant gpio is
requested.
- Move P2SB from Apollo Lake to a more generic location
- Add a function to find a device by drvdata in DM core
- Enhancement of DM IRQ uclass driver
- Add a clock driver for Intel devices
- Add support for ACPI general-purpose events
- Add a TPM driver for H1/Cr50
- Enable TPM on Google Chromebook Coral
Jagan Teki [Mon, 30 Dec 2019 14:29:09 +0000 (19:59 +0530)]
doc: fix opensbi build steps for AX25-AE350
OpenSBI build steps are marked as normal text in
AX25-AE350 documentation.
Move them into code-block so-that it can show it
as build steps.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 25 Dec 2019 05:27:44 +0000 (00:27 -0500)]
riscv: Add option to print registers on exception
When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 18 Dec 2019 02:35:32 +0000 (21:35 -0500)]
riscv: Fix breakage caused by linker relaxation
Due to the two-instruction sequence needed to access arbitrary memory
locations, the RISC-V linker aggressively optimises memory accesses and
jumps at link-time. This is called "linker relaxation," and is discussed
in this SiFive article
<https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain>.
One of the optimizations in place is to assume that the __global_pointer
symbol is placed in the gp register. To quote the article:
"...The magic __global_pointer$ symbol is defined to point 0x800 bytes
past the start of the .sdata section. The 0x800 magic number allows
signed 12-bit offsets from __global_pointer$ to address symbols at the
start of the .sdata section. The linker assumes that if this symbol is
defined, then the gp register contains that value, which it can then use
to relax accesses to global symbols within that 12-bit range. The
compiler treats the gp register as a constant so it doesn't need to be
saved or restored, which means it is generally only written by _start,
the ELF entry point."
However, U-Boot instead keeps the global data pointer in gp. This causes
memory accesses and jumps optimized to use the gp pointer to fail. To
fix this problem, we undefine the __global_pointer symbol.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Use `test' command to test for file existence instead of relying on the
old functionality of the `ext2load' command (which now reports an error
when attempting to load a zero length file).
Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
Robert Beckett [Fri, 31 Jan 2020 13:07:59 +0000 (15:07 +0200)]
board: ge: bx50v3: Enable DM PWM for backlight
Add backlight and panel devicetree definitions
Use UCLASS_PANEL to enable backlight via display enable handler
Remove old explicit gpio code for handling backlight
Use cls command to initiate display in HW agnostic manner
Enable DM regulator and pwm
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Ian Ray [Fri, 31 Jan 2020 13:07:57 +0000 (15:07 +0200)]
board: ge: mx53ppd: enable DM_VIDEO
Enable DM_VIDEO for mx53ppd.
Enable DM_REGULATOR_FIXED and DM_PWM for the backlight.
Remove unused MX53PPD_LCD_POWER.
Remove old (incorrect) setup_iomux_lcd.
Enable backlight via display enable handler.
Use cls command to initiate display in HW agnostic manner.
Modify `failbootcmd' to use lcdputs.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Robert Beckett [Fri, 31 Jan 2020 13:07:54 +0000 (15:07 +0200)]
board: ge: bx50v3, imx53ppd: use DM I2C
Remove old (pre-DM) i2c setup code.
Enable DM i2c.
Convert common code to use DM rtc.
Convert common code to read VPD from eeprom partition.
Convert the generic i2c PMIC init code to use the new da9063 driver.
mx53ppd only:
Correct RTC compatible in device tree.
Enable MXC DM i2c driver.
Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc.
Make GPIO banks available during preloc, since initialisation is done
in board_early_init_f().
Add gpio_request() calls to satisfy the DM_GPIO compatibility API.
Remove unused power configuration.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
Alifer Moraes [Mon, 20 Jan 2020 16:31:02 +0000 (13:31 -0300)]
mx6sabresd: Convert PCI to driver model
Convert imx6sabresd PCI to driver model to fix the following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
After the conversion the following commands were used for testing:
=> pci enum
PCI: Failed autoconfig bar 10
PCI: Failed autoconfig bar 10
=> pci 1
Scanning PCI devices on bus 1
BusDevFun VendorId DeviceId Device Class Sub-Class Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Mon, 20 Jan 2020 16:31:01 +0000 (13:31 -0300)]
mx6sabre_common: Remove FEC related settings
In preparation for converting to DM_ETH and moving the FEC symbols
to Kconfig we need to move the FEC definitions to mx6sabreauto.h
and mx6sabresd.h to avoid build breakage during the conversion.
Heiko Schocher [Thu, 30 Jan 2020 13:10:05 +0000 (14:10 +0100)]
imx6: aristainetos: fix NAND detection with latest mainline
commit 88718be30010 ("mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND")
moved CONFIG_NAND -> CONFIG_MTD_RAW_NAND. Adapt board code to this
change, as last merge did not respect the above commit.
Joris Offouga [Wed, 29 Jan 2020 21:06:01 +0000 (22:06 +0100)]
mx7dsabre: Fix usbtog probe when use dfu or ums
Before:
=> ums 0 mmc 0
UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1dacc00
usb dr_mode not found
CTRL+C - Operation aborted
=> dfu 0 mmc 0
usb dr_mode not found
The 'enable-active-high' DTS property configures GPIO so it is active with
HIGH state (by default it is low).
The 'regulator-boot-on' property indicates that the regulator was enabled
in the 'earlier' stage - i.e. bootloader/firmware.
In the XEA case the 'fec-3v3' was configured (as a "wrapper" on GPIO0_0) in
very early SPL code, so it shouldn't be modified at latter stages.
projects / u-boot.git / log