AKASHI Takahiro [Wed, 11 Mar 2020 06:18:18 +0000 (15:18 +0900)]
efi_loader: get_memory_map: return parameters whenever possible
Currently, if GetMemoryMap API returns EFI_BUFFER_TOO_SMALL, it doesn't
set valid values to other parameters, descriptor_size and
descriptor_version, except memory_map_size.
Some efi applications, however, may use those value; in particular,
xen uses descriptor_size to calculate a size of buffer to be allocated.
While UEFI specification is ambiguous in this point, it would be better
to address this issue proactively to maximize the compatibility with
existing efi applications.
With this patch, for example, xen.efi (and hence linux kernel) can be
started via bootefi without modification.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sam Shih [Wed, 4 Mar 2020 12:03:48 +0000 (20:03 +0800)]
arm: mediatek: remove unused binman config
The binman-option BINMAN_FDT is introduced by this commit:
commit 3c10dc95bdd0 ("binman: Add a library to access binman entries")
BINMAN_FDT being selected when BINMAN=y that resulting in mt7623
and mt7622 are unable to boot. The root cause of this issue is commit:
commit cbd2fba1eca1 ("arm: MediaTek: add basic support for MT7629 boards")
select BINMAN=y in all mediatek SoCs, and others mediatek SoCs not
expect to use BINMAN_FDT.
This patch remove BINMAN=y option when ARCH_MEDIATEK=y and
move this to the specify SoCs part config.
Signed-off-by: Sam Shih <sam.shih@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
Currently when booting the kernel on i.MX8 U-Boot hangs in an
endless loop when switching off dma, connectivity or lsio power
domains during device removal. It hapens first when removing
gpio0 (gpio@5d080000) device, here its power domain device
'lsio_gpio0' is obtained for switching off power. Since the
obtained 'lsio_gpio0' device is removed afterwards, its power
domain is also switched off and here the parent power domain
device 'lsio_power_domain' is optained for switching off the
power. Thereafter, when the obtained 'lsio_power_domain' is
removed, device_remove() removes its first child 'lsio_gpio0'.
During this child removal the 'lsio_power_domain' device is
obtained again for switching and when removing it later,
the same child removal is repeated, so we are stuck in an
endless loop. Below is a snippet from dm tree on i.MX8QXP
for better illustration of the DM devices relationship:
Pedro Jardim [Thu, 13 Feb 2020 12:25:32 +0000 (09:25 -0300)]
mx6slevk: Convert to DM_ETH
This fixes the following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Pedro Jardim [Thu, 13 Feb 2020 17:59:43 +0000 (14:59 -0300)]
mx6sabreauto: Convert to DM_ETH
This fixes the following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Alifer Moraes [Fri, 14 Feb 2020 19:18:50 +0000 (16:18 -0300)]
arm: dts: imx8mq-evk: add phy-reset-gpios for fec1
Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the
driver reset the phy via dts description adding a reset duration of 10 ms
following atheros 8031's datasheet recommendation.
Alifer Moraes [Mon, 10 Feb 2020 14:28:01 +0000 (11:28 -0300)]
mx6sabresd: Convert ethernet to driver model
Convert imx6sabresd ethernet to driver model to fix the following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Fabien Lehoussel [Mon, 24 Feb 2020 15:45:31 +0000 (16:45 +0100)]
board: sama5d3_xplained: Fix uboot size when loaded from NAND by SPL
Uboot size is incorrect.
Uboot SPL use CONFIG_SYS_MONITOR_LEN to read uboot from NAND : 0x80000
With sama5d3_xplained_nandflash_defconfig : u-boot.bin size is ~800Ko 0xC0000
Clemens Gruber [Mon, 24 Feb 2020 19:52:20 +0000 (20:52 +0100)]
net: phy: marvell: Unify 88E151x series phy_driver
The PHY models of the Marvell 88E151x series are not reliably
distinguishable by their uid / PHY identifiers.
The 88E1510, 88E1512, 88E1514 and 88E1518 all have the same OUI and
model number and bits 3:0 in the PHY Identifier 2 (Page 0, Reg 3) are
described as HW revision number, but both 88E1510 and 88E1518 PHYs were
observed with the same HW rev number (1).
Before commit 83cfbeb0df9f ("net: phy: Fix mask so that we can identify
Marvell 88E1518"), the 88E151x were detected because the HW revision
bits were masked from the uid. After that change, 88E1510/12/18 were all
detected as 88E1518 and the 88E1510 specific code was no longer run.
I modified the mask to again ignore all four HW revision bits, removed
the 88E1510 specific code (board-specific LED/INTn setup), which was not
called since late 2016 anyway and renamed the config function and
phy_driver struct to the better fitting 88e151x.
The uid and mask bits 3:0 are now again the same as in the Linux kernel.
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Michal Simek [Tue, 18 Feb 2020 12:51:02 +0000 (13:51 +0100)]
net: phy: dp83867: Add SGMII mode type switching
This patch adds ability to switch beetween two PHY SGMII modes.
Some hardware, for example, FPGA IP designs may use 6-wire mode
which enables differential SGMII clock to MAC.
Patch description, dt flags have been done in mainline Linux by
commit a2111c460c0c ("net: phy: dp83867: Add documentation for SGMII mode type")
and by commit 507ddd5c0d47 ("net: phy: dp83867: Add SGMII mode type switching")
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Mon, 17 Feb 2020 09:38:57 +0000 (10:38 +0100)]
dt-bindings: net: dp83867: Remove binding doc from U-Boot tree
U-Boot is having DT which doesn't cover all options currently supported by
driver. DT binding is aligned with Linux kernel version available here.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ti,dp83867.txt
Based on my talk with Grygorii Strashko better will be to remove it.
Also Linux kernel bindings are being converted to yaml that's another
reason to do it only at one place.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Alex Marginean [Thu, 9 Jan 2020 08:50:05 +0000 (10:50 +0200)]
net: phy: add XFI, USXGMII types to is_10g_interface() helper
The helper is used to reset PHYs on connect and it determines the clause
to use (C22/C45) based on interface type. This fixes 'PHY reset timed out'
warnings in console for USXGMII/XFI PHYs.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andre Przywara [Fri, 3 Jan 2020 22:08:47 +0000 (22:08 +0000)]
net: phy: Fix overlong PHY timeout
Commit 27c3f70f3b50 ("net: phy: Increase link up delay in
genphy_update_link()") increased the per-iteration waiting time from
1ms to 50ms, without adjusting the timeout counter. This lead to the
timeout increasing from the typical 4 seconds to over three minutes.
Adjust the timeout counter evaluation by that factor of 50 to bring the
timeout back to the intended value.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Fixes: net: phy: Increase link up delay in genphy_update_link() ("27c3f70f3b50") Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Matthias Brugger <mbrugger@suse.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andre Przywara [Mon, 25 Nov 2019 01:32:15 +0000 (01:32 +0000)]
doc: net: Rewrite network driver documentation
doc/README.drivers.eth seems like a good source for understanding
U-Boot's network subsystem, but is only talking about legacy network
drivers. This is particularly sad as proper documentation would help in
porting drivers over to the driver model.
Rewrite the document to describe network drivers in the new driver model
world. Most driver callbacks/methods are almost identical in their
semantic, but recv() differs in some important details.
Also keep some parts of the original text at the end, to help
understanding old drivers. Add some hints on how to port drivers over.
This also uses the opportunity to reformat the document in reST, on the
way moving it into doc/driver-model and adding it into the structure
there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 4 Dec 2019 13:32:15 +0000 (15:32 +0200)]
drivers: net: phy: aquantia: drop XGMII as a valid system interface proto
Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid
protocol configuration. The PHY doesn't support it, it's just used as an
alias for one of the other two protocols.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add NC-SI to the usual phy handling. This makes two notable changes:
- Somewhat similar to a fixed phy, phy_connect() will create an NC-SI
phy if CONFIG_PHY_NCSI is defined.
- An early return is added to phy_read() and phy_write() to handle a
case like the NC-SI phy which does not define a bus.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This introduces support for the NC-SI protocol, modelled as a phy driver
for other ethernet drivers to consume.
NC-SI (Network Controller Sideband Interface) is a protocol to manage a
sideband connection to a proper network interface, for example a BMC
(Baseboard Management Controller) sharing the NIC of the host system.
Probing and configuration occurs by communicating with the "remote" NIC
via NC-SI control frames (Ethernet header 0x88f8).
This implementation is roughly based on the upstream Linux
implementation[0], with a reduced feature set and an emphasis on getting
a link up as fast as possible rather than probing the full possible
topology of the bus.
The current phy model relies on the network being "up", sending NC-SI
command frames via net_send_packet() and receiving them from the
net_loop() loop (added in a following patch).
The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent
field definitions.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Mon, 9 Mar 2020 17:01:57 +0000 (13:01 -0400)]
Azure/Travis: Re-sync jobs and clarify exclusions
We keep both of these jobs in sync as much as possible even when the
primary motivation is to keep Travis from exceeding the build time limit
there. With that in mind:
- Use "rk" not "rockchip" to get all Rockchip SoC platforms in one job,
rather than just all Rockchip vendor platforms.
- The NXP LX216* SoCs have their own job, exclude them from the AArch64
generic job.
- SoCFPGA SoCs have their own job, exclude them from the AArch64 generic
job.
Giulio Benetti [Fri, 31 Jan 2020 13:39:47 +0000 (14:39 +0100)]
serial_lpuart: make clock failure less verbose
Some device may enable CONFIG_CLK but not still support this clock in
CC, so better use debug() in place of dev_warn() otherwise a lot of
boards will throw useless dev_warn()s.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Simon Glass <sjg@chromium.org>
imx8mm/mn: Add missing root clock entry for ARM core clock
The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
code to retrieve the core clock frequency. As the root clock is not
listed we currently get:
CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz
Fix this by adding the missing entry, which results in:
Baruch Siach [Tue, 4 Feb 2020 16:57:08 +0000 (18:57 +0200)]
mx6cuboxi: don't disable fdt relocation
fdt_high value of 0xffffffff disables fdt relocation on boot. We don't
need that for Cubox-i/Hummingboard. Rely on generic code to find the
optimal fdt location at boot time.
, which causes the console to not show characters after the LPUART driver
is probed as the 'baudrate' variable is not properly translated.
Fix it by splitting the console variable in two parts: one for the
ttyLP0 part and the other one for the baudrate, which matches the way
it is done on other i.MX targets.
Tested by successfully booting a mainline kernel on a i.MX8QXP MEK
board.
Heiko Schocher [Mon, 2 Mar 2020 08:44:03 +0000 (09:44 +0100)]
imx6, aristainetos2c: add da9063 pmic setup
On the aristainetos2c boards the PMIC needs to be initialized,
because the Ethernet PHY uses a different regulator that is not
setup per hardware default. This does not influence the other
versions as this regulator isn't used there at all.
- Revert "x86: use invd instead of wbinvd in real mode start code"
- Convert toradex boards README to reST
- serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()
- x86: apl: Use cpu_x86_get_count() for cpu_ops.get_count
Wolfgang Wallner [Tue, 25 Feb 2020 12:19:48 +0000 (13:19 +0100)]
x86: apl: Use cpu_x86_get_count() for cpu_ops.get_count
Use cpu_x86_get_count() to read the number of cores.
cpu_x86_get_count() reads the number of CPUs from the device tree.
Using this function we can support multiple Apollo Lake
variants, e.g.: E3940 (4 cores) and E3930 (2 cores).
This was tested on the E3940 and E3930 Apollo Lake variants.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Fri, 21 Feb 2020 11:20:09 +0000 (12:20 +0100)]
doc: Chromebook Coral: Fix typo for "Top of CAR region"
The value for "Top of CAR region" should be fefc0000, not fefc000. This matches the Kconfig default values, as
SYS_CAR_ADDR and SYS_CAR_SIZE are 0xfef00000 and 0xc0000
respectively.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Tue, 18 Feb 2020 14:32:10 +0000 (15:32 +0100)]
x86: p2sb: Drop 'apl' prefix
Drop the Apollo Lake prefix 'apl' from the functions, types and
variables in the P2SB driver.
The P2SB is not Apollo Lake specific, and as such it was moved in
commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic
location") from the Apollo Lake folder to the intel_common folder.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()
Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
which potentially accesses the parent PCI bus. If this happens before
the parent PCI bus is probed the resulting address will be wrong.
This behavior was triggered by commit 82de42fa1468 ("dm: core:
Allocate parent data separate from probing parent").
According to a comment in drivers/pci/pci-uclass.c [1] accessing
the PCI parent bus in ofdata_to_platdata() is not allowed, and the
access should be moved to the probe() function.
Move the call to dev_read_addr_pci() and the related handling of the
'addr' value from the ofdata_to_platdata() to its own function,
which is then called from the probe() method.
While moving the code, the comment /* try Processor Local Bus device
first */ was dropped. It was initially added with commit 3db886a5bf38
("serial: ns16550: Support ns16550 compatible pci uart devices") and
later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
to read a PCI BAR").
[1] Comment in drivers/pci/pci-uclass.c:
"A common cause of this problem is that this function is called in the
ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
method is not allowed, since it has not yet been probed. To fix this,
move that access to the probe() method of @dev instead."
Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from probing parent") Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # Tested on Intel Galileo
As real hardware testing (*) shows the above mentioned commit
breaks U-Boot on it. Revert for the upcoming release. We may get
more information in the future and optimize the code accordingly.
(*) on Intel Edison board.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Igor Opaniuk [Wed, 12 Feb 2020 15:14:29 +0000 (17:14 +0200)]
doc: board: verdin-imx8mm: convert readme to reST
Convert README to reStructuredText format.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: spell out U-Boot correctly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Igor Opaniuk [Wed, 12 Feb 2020 15:14:28 +0000 (17:14 +0200)]
doc: board: toradex: add colibri_imx7.rst
- add initial index for toradex boards reST documentation
- add initial colibri_imx7.rst doc file which provides all needed
information for obtaining a workable image ready for flashing
for both eMMC/NAND versions of Colibri iMX7.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: make title underline the same length as the title itself] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 2 Feb 2020 20:37:06 +0000 (13:37 -0700)]
x86: Correct error return value in mrccache_get_region()
This function doesn't use uclass_find_first_device() correctly. Add a
check that the device is found so we don't try to read properties from a
NULL device.
The fixes booting on minnoxmax.
Fixes: 87f1084a630 ("x86: Adjust mrccache_get_region() to use livetree") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add driver flag to skip power domain disabling on device removal.
Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
dm: core: Add a flag for power domain control on device removal
In various cases a power domain must stay enabled after device
removal when booting OS (i.e. serial debug console or display).
Add a flag to selectively skip switching off a power domain.
Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 15 Feb 2020 13:10:02 +0000 (14:10 +0100)]
ARM: socfpga: Permit overriding the default timer frequency
The default timer rate may be different than 25 MHz, permit overriding
the default rate in board configuration file. Ultimatelly, this should
be properly handled by a clock driver, however that is not available
on Gen5 yet.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Sat, 15 Feb 2020 13:46:10 +0000 (14:46 +0100)]
rtc: m41t62: add compatible for m41st87
This adds a compatible string for m41st87. This ensures that this driver
can be used for m41st87.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
Seung-Woo Kim [Thu, 13 Feb 2020 08:24:11 +0000 (17:24 +0900)]
gadget: f_thor: add missing line breaks for pr_err()
After the commit 9b643e312d52 ("treewide: replace with error()
with pr_err()"), there are pr_err() usages without line break. Add
missing line breaks for pr_err() used in f_thor.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Andy Shevchenko [Wed, 29 Jan 2020 15:23:14 +0000 (17:23 +0200)]
dfu: Reset timeout in case of DFU request
In case dfu command is being executed with timeout option,
the timer may expire in the middle of DFU operation. If there
is DFU request coming, we may simple reset timeout value
to prevent aborting of ongoing DFU operation.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ferry Toth <ftoth@exalondelft.nl>
Marek Vasut [Fri, 24 Jan 2020 00:31:37 +0000 (01:31 +0100)]
ARM: rmobile: Limit bootloader size to 1 MiB on R-Car Gen3
The HF/QSPI flash layout permits up to 1 MiB large bootloader blob,
set CONFIG_BOARD_SIZE_LIMIT to enforce this limit and set the
monitor size to match accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Sat, 29 Feb 2020 13:01:07 +0000 (08:01 -0500)]
Merge tag 'efi-2020-04-rc4-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc4 (2)
In Linux next-20200228 patches have been merged to load an initial ramdisk
using an EFI_LOAD_FILE2_PROTOCOL provided by the firmware. See commit ec93fc371f01 ("efi/libstub: Add support for loading the initrd from a
device path"). The idea behind it is that the firmware should be
responsible for validating the initrd in a secure boot setup.
This pull-request comprises a patch series which let's U-Boot provide an
initial implementation of the EFI_LOAD_FILE2_PROTOCOL providing the initrd.
Masahiro Yamada [Fri, 28 Feb 2020 12:57:21 +0000 (21:57 +0900)]
ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property
The compatible string "i2c-eeprom" is U-Boot own compatible, which
has never been approved by the DT community. "u-boot,i2c-offset-len"
is also a U-Boot own hack.
Linux adds "atmel,*" as generic compatibles, and U-Boot also followed
it by commit d7e28918aa3f ("i2c_eeprom: Add reading support").
The U-Boot own hack is no longer needed. Just sync with Linux.
Ilias Apalodimas [Fri, 21 Feb 2020 07:55:45 +0000 (09:55 +0200)]
efi_loader: Implement FileLoad2 for initramfs loading
Following kernel's proposal for an arch-agnostic initrd loading
mechanism [1] let's implement the U-boot counterpart.
This new approach has a number of advantages compared to what we did up
to now. The file is loaded into memory only when requested limiting the
area of TOCTOU attacks. Users will be allowed to place the initramfs
file on any u-boot accessible partition instead of just the ESP one.
Finally this is an attempt of a generic interface across architectures
in the linux kernel so it makes sense to support that.
The file location is intentionally only supported as a config option
argument(CONFIG_EFI_INITRD_FILESPEC), in an effort to enhance security.
Although U-boot is not responsible for verifying the integrity of the
initramfs, we can enhance the offered security by only accepting a
built-in option, which will be naturally verified by UEFI Secure Boot.
This can easily change in the future if needed and configure that via ENV
or UEFI variable.
Christophe Leroy [Wed, 26 Feb 2020 16:17:52 +0000 (16:17 +0000)]
watchdog: Don't select CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG at the same time
Commit 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") introduced an automatic selection of CONFIG_WATCHDOG by
CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like
boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected
as they are mutually exclusive.
Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG
Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version") Cc: Stefan Roese <sr@denx.de> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Stefan Roese <sr@denx.de>
Christophe Leroy [Thu, 20 Feb 2020 07:39:51 +0000 (07:39 +0000)]
watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOG
Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros
cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not
compatible with the 8xx because it starts the watchdog HW timer at
reset and must be serviced from the very beginning including while
U-boot is executed in the firmware before relocation in RAM.
Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible.
Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by
removing the lines put in comment in that commit, and also remove
again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by
that commit and brought back by mistake by commit b3134ffbd944
("watchdog: Kconfig: Sort entry alphabetically")
Note that there was an 'imply WATCHDOG' in the original commit but
it disappeared in the Kconfig alphabetical sorting, so no need to
remove it here.
Michal Simek [Thu, 6 Feb 2020 13:36:46 +0000 (14:36 +0100)]
net: zynq: Free allocated buffers in case of error
Driver probe function is called again and again in case of error.
Malloc space is getting full which is is reported by:
Insufficient RAM for page table: 0x15000 > 0x14000.
Please increase the size in get_page_table_size()
### ERROR ### Please RESET the board ###
The patch is freeing allocated buffers on error path to avoid panic.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 6 Feb 2020 14:59:23 +0000 (15:59 +0100)]
net: phy: dp83867: Clean force link good bit
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which
means FORCE_LINK_GOOD is already setup. Origin code was doing write but the
new code is doing read/modify/write and keep this bit untouched. That's why
ethernet stop to work.
The patch is cleaning this bit when PHYCR value is composed.
Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.
T Karthik Reddy [Mon, 20 Jan 2020 06:59:23 +0000 (23:59 -0700)]
mtd: nand: Fix on-die ecc issues in arasan_nfc driver
Fixed wrong enumeration of nand_config structure. Added chip select
function before reading the nand chip for maf/dev id's, without this
unable to access id's from some of the micron chips. Also added a
print statement to identify if a nand flash is using on-die ecc.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Thu, 16 Jan 2020 11:55:05 +0000 (03:55 -0800)]
versal: drivers: clk: Fix invalid clock name queries
The clock driver makes EEMI call to get the name of invalid clk
when executing versal_get_clock_info() function. This results in
error messages.
Added check for validating clock before saving clock attribute and
calling versal_pm_clock_get_name() in versal_get_clock_info() function.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 15 Jan 2020 09:15:13 +0000 (02:15 -0700)]
net: zynq_gem: Use ulong instead of u32 data type
flush_dcache_range() expects unsigned long in the arguments. Here u32
variable is unable to hold the higher address value when ddr mapped
to higher addresses & flushing lower address dchache range instead
which is unmapped causing to crash.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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