Michal Simek [Wed, 8 Apr 2020 08:09:16 +0000 (10:09 +0200)]
lib: strto: Stop detection when invalid char is used
This issue has been found when mtd partition are specified. Autodetection
code should stop when the first invalid char is found.
Here is the example of commands:
setenv mtdids nand0=memory-controller@e000e000
setenv mtdparts "mtdparts=nand0:4m(boot),4m(env),64m(kernel),96m(rootfs)"
mtd list
mtd: nand: pxa3xx: fix raw read when last_chunk_size == 0
Commit 6293b0361d9 ("mtd: nand: pxa3xx: add raw read support") added the
local data_len variable in handle_data_pio() to track read size, but
forgot to update the condition of drain_fifo() call. That happens to
work when the layout last_chunk_size != 0. But when last_chunk_size ==
0, drain_fifo() is not called to read the last chunk, which leads to
"Wait timeout!!!" error. Fix this.
Ovidiu Panait [Sun, 29 Mar 2020 17:57:40 +0000 (20:57 +0300)]
arm: asm/cache.c: Introduce arm_reserve_mmu
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.
Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 24 Apr 2020 18:07:59 +0000 (14:07 -0400)]
Merge tag 'u-boot-stm32-20200424' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Solve stm32mp15 pinctrl dts issue (patch conflict in branches master and next)
- Split device tree for DHCOR Som and AV 96 board
- Update PLL4 setting in AV96 board
- Enable bootd, iminfo, imxtract on DHCOM
Tom Rini [Fri, 24 Apr 2020 17:04:38 +0000 (13:04 -0400)]
Merge branch '2020-04-24-master-imports'
- Assorted minor bugfixes.
- Resync fixdep with Linux v5.7-rc1
- Numerous changes to reduce SPL in various cases including when we have
read-only env support.
- Allow mkimage to align the header on FIT images to a specific size.
Tom Rini [Fri, 24 Apr 2020 16:30:45 +0000 (12:30 -0400)]
sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB
When moving the PHYLIB PHY drivers around in Kconfig we did not at the
same time perform a careful migration of the related drivers and
sub-options. This lead to the case where previously Kconfig-enabled
driver choices were now disabled on some platforms. Correct this by
enabling both the PHY driver and sub-option on the above referenced
platforms.
Fixes: af2cbfd6b982 ("drivers: net: Provide Kconfig menu for PHYLIB") Fixes: 8728c97eff5b ("configs: Re-sync") Reported-by: Dario <dario86@tutamail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
---
After checking back on the original commit I can see that these are the
only two platforms to have been broken in the change.
Simon Glass [Sun, 19 Apr 2020 23:02:32 +0000 (17:02 -0600)]
travis: Correct error checking when building boards
At present if buildman reports an error, the travis build still succeeds.
This is because the travis script does not stop when it sees errors; nor
does it automatically return the exit code. Also the current error
checking never triggers since 'ret' is not set.
Fix this by setting 'ret' correctly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
mkimage: fit: Unmmap the memory before closing fd in fit_import_data()
Without calling munmap(), the follow-up call to open() the same file
with a flag O_TRUNC seems not to cause any issue on Linux, but it fails
on Windows with error like below:
Can't open kernel_fdt.itb.tmp: Permission denied
Fix this by unmapping the memory before closing fd in fit_import_data().
Signed-off-by: Lihua Zhao <lihua.zhao@windriver.com> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Joel Johnson [Fri, 17 Apr 2020 15:42:29 +0000 (09:42 -0600)]
spl: Kconfig: de-dup SPL_DM_GPIO definition
Two nearly concurrent commits (d4d65e112 and bcee8d676) added a
SPL_DM_GPIO symbol. Resolve the duplication in favor of the version
in drivers/gpio/Kconfig.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
fixdep: handle CONFIG_IS_ENABLE() and friends for TPL
Since commit f1c6e1922eb5 ("spl: dm: use CONFIG_IS_ENABLED to test for
the DM option"), CONFIG_IS_ENABLED() handles CONFIG_TPL_* options, but
fixdep still cannot because it hard-codes the "SPL_" prefix as follows:
Do not build image_sign_info helper functions in SPL if not needed.
Fixes: b983cc2da0ba ("lib: rsa: decouple rsa from FIT image verification") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
The OID registry is only used by crypto functions that are not built in
SPL. So we should not build it in SPL.
Fixes: a9b45e6e8382 ("lib: add oid registry utility") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
When building on a 32bit host the following warning occurs:
tools/image-host.c: In function ‘fit_image_read_data’:
tools/image-host.c:310:42: warning: format ‘%ld’ expects argument of type
‘long int’, but argument 3 has type ‘ssize_t’ {aka ‘int’} [-Wformat=]
printf("Can't read all file %s (read %ld bytes, expexted %ld)\n",
~~^
%d
filename, n, sbuf.st_size);
~
n is of type ssize_t so we should use %zd for printing.
Fixes: 7298e422504e ("mkimage: fit: add support to encrypt image with aes") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling on ARMv7-M fails when trying to address the CPSR register which
is not available on this architecture.
Atomic functions refer to the CPSR register if compiled with
arch/arm/include/asm/proc-armv/system.h. On ARMv7-M we should hence
use arch/arm/thumb1/include/asm/proc-armv/system.h instead.
Kever Yang [Mon, 30 Mar 2020 03:56:24 +0000 (11:56 +0800)]
mkimage: fit_image: Add option to make fit header align
The image is usually stored in block device like emmc, SD card, make the
offset of image data aligned to block(512 byte) can avoid data copy
during boot process.
eg. SPL boot from FIT image with external data:
- SPL read the first block of FIT image, and then parse the header;
- SPL read image data separately;
- The first image offset is the base_offset which is the header size;
- The second image offset is just after the first image;
- If the offset of imge does not aligned, SPL will do memcpy;
The header size is a ramdon number, which is very possible not aligned, so
add '-B size'to specify the align size in hex for better performance.
example usage:
./tools/mkimage -E -f u-boot.its -B 0x200 u-boot.itb
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Reviewed-by: Tom Rini <trini@konsulko.com>
Our version check in Documentation/conf.py never envisioned a world where
Sphinx moved beyond 1.x. Now that the unthinkable has happened, fix our
version check to handle higher version numbers correctly.
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
[rebase for u-boot] Signed-off-by: Sean Anderson <seanga2@gmail.com>
Rasmus Villemoes [Wed, 19 Feb 2020 09:47:43 +0000 (09:47 +0000)]
env/sf.c: drop private CMD_SAVEENV logic
Deciding whether to compile the env_sf_save() function based solely on
CONFIG_SPL_BUILD is wrong: For U-Boot proper, it leads to a build
warning in case CONFIG_CMD_SAVEENV=n (because the env_save_ptr() macro
causes the function to indeed not be referenced anywhere). And for
SPL, when one selects CONFIG_SPL_SAVEENV, one obviously expects to
actually be able to save the environment.
Rasmus Villemoes [Wed, 19 Feb 2020 09:47:42 +0000 (09:47 +0000)]
env/ext4.c: remove CONFIG_CMD_SAVEENV ifdef
Removing this ifdef/endif pair yields a "defined but unused warning"
for CONFIG_CMD_SAVEENV=n, but that vanishes if we use the ENV_SAVE_PTR
macro instead. This gives slightly better compile testing, and
moreover, it's possible to have
Rasmus Villemoes [Wed, 19 Feb 2020 09:47:41 +0000 (09:47 +0000)]
env/fat.c: remove private CMD_SAVEENV logic
Always compile the env_fat_save() function, and let
CONFIG_IS_ENABLED(SAVEENV) (via the ENV_SAVE_PTR macro) decide whether
it actually ends up being compiled in.
Rasmus Villemoes [Wed, 19 Feb 2020 09:47:40 +0000 (09:47 +0000)]
env_internal.h: add alternative ENV_SAVE_PTR macro
The current definition of the env_save_ptr does not take SPL_SAVEENV
into account. Moreover, the way it is implemented means that drivers
need to guard the definitions of their _save methods with ifdefs to
avoid "defined but unused" warnings in case CMD_SAVEENV=n.
The ifdeffery can be avoided by using a "something ? x : NULL"
construction instead and still have the compiler elide the _save
method when it is not referenced. Unfortunately we can't just switch
the existing env_save_ptr macro, since that would give a lot of build
errors unless all the ifdeffery is removed at the same time.
Conversely, removing that ifdeffery first would merely lead to the
"defined but unused" warnings temporarily, but for some storage
drivers it requires a bit more work than just removing their private
CMD_SAVEENV logic.
So introduce an alternative to env_save_ptr, which for lack of a
better name is simply uppercased, allowing one to update storage
drivers piecemeal to both reduce their ifdeffery and honour
CONFIG_SPL_SAVEENV.
Rasmus Villemoes [Wed, 19 Feb 2020 09:47:39 +0000 (09:47 +0000)]
env: add SAVEENV as an alias of the CMD_SAVEENV symbol
Currently, testing whether to compile in support for saving the
environment is a bit awkward when one needs to take SPL_SAVEENV into
account, and quite a few storage drivers currently do not honour
SPL_SAVEENV.
To make it a bit easier to decide whether environment saving should be
enabled, introduce SAVEENV as an alias for the CMD_SAVEENV
symbol. Then one can simply use
Frédéric Danis [Tue, 17 Mar 2020 16:59:09 +0000 (17:59 +0100)]
bootcount_ext: Add flag to enable/disable bootcount
After a successful upgrade, multiple problem during boot sequence may
trigger the altbootcmd process.
This patch adds a version and an upgrade_available entries to the
bootcount file to enable/disable the bootcount check.
When failing to read the bootcount file it will consider that bootcount is
enabled, acting as previously, and update the file accordingly.
The bootcount file is only saved when `upgrade_available` is true, this
allows to save writes to the filesystem.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Thu, 27 Feb 2020 13:56:12 +0000 (13:56 +0000)]
make env_entry::callback conditional on !CONFIG_SPL_BUILD
The callback member of struct env_entry is always NULL for an SPL
build. Removing it thus saves a bit of run-time memory in the
SPL (when CONFIG_SPL_ENV_SUPPORT=y) since struct env_entry is embedded
in struct env_entry_node - i.e. about 2KB for the normal case of
512+change hash table entries.
Two small fixups are needed for this, all other references to the
callback member are already under !CONFIG_SPL_BUILD: Don't initialize
.callback in set_flags() - hsearch_r doesn't use that value
anyway. And make env_callback_init() initialize ->callback to NULL for
a new entry instead of relying on an unused or deleted entry having
NULL in ->callback.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Thu, 27 Feb 2020 13:56:11 +0000 (13:56 +0000)]
lib/hashtable.c: don't test ->callback in SPL
In SPL, environment callbacks are not supported, so e->callback is
always NULL. Removing this makes the SPL a little smaller (about 400
bytes in my ppc build) with no functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Thu, 27 Feb 2020 13:56:10 +0000 (13:56 +0000)]
env: remove callback.o for an SPL build
env.h says this about about callback declarations (U_BOOT_ENV_CALLBACK):
* For SPL these are silently dropped to reduce code size, since environment
* callbacks are not supported with SPL.
So env_callback_init() does a lot of work to not find anything in the
guaranteed empty env_clbk list. Drop callback.o entirely from the link
and stub out the only public function defined in callback.o. This cuts
about 600 bytes from the SPL on my ppc build.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
Landen Chao [Tue, 18 Feb 2020 08:49:37 +0000 (16:49 +0800)]
eth: mtk-eth: add mt7531 switch support in mediatek eth driver
mt7531 is a 7-ports switch with 5 embedded giga phys, and uses the same
MAC design of mt7530. The cpu port6 supports SGMII only. The cpu port5
supports RGMII or SGMII in different model.
mt7531 is connected to mt7622 via both RGMII and SGMII interfaces.
In this patch, mt7531 cpu port5 or port6 is configured to maximum
capability to align CPU MAC setting.
The dts has been committed in the commit 6efa450565cdc ("arm: dts:
mediatek: add ethernet and sgmii dts node for mt7622")
Signed-off-by: Landen Chao <landen.chao@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
Charles Frey [Wed, 19 Feb 2020 16:50:15 +0000 (16:50 +0000)]
watchdog: mpc8xx_wdt: Allow selection of watchdog mode through environment
The mpc8xx watchdog can work either in 'reset mode' or 'NMI mode'.
The selection can be done at startup only.
It is desirable to select the mode without rebuilding U-boot.
It is also desirable to disable the watchdog without rebuilding.
At watchdog startup, check environment variable 'watchdog_mode'.
If it is 'off', the watchdog is not started. If it is 'nmi',
the watchdog is started in NMI mode. Otherwise, it is started
in reset mode which is the default mode.
Signed-off-by: Charles Frey <charles.frey@c-s.fr> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Marek Vasut [Tue, 31 Mar 2020 17:51:36 +0000 (19:51 +0200)]
ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an AV96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.
It is also highly recommended to configure the board for the DHCOM
make stm32mp15_dhcom_basic_defconfig
make DEVICE_TREE=stm32mp15xx-dhcor-avenger96
as that permits reusing the board code for the DH components, like
accessing and reading out the ethernet MAC from EEPROM.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
Marek Vasut [Tue, 31 Mar 2020 17:51:35 +0000 (19:51 +0200)]
ARM: dts: stm32: Adjust PLL4 settings on AV96
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which
can not easily divide the clock down to e.g. 50 MHz for high speed
SD and eMMC devices, so those devices end up running at 30 MHz as
that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P
and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz
for optimal operation of both SD and eMMC, SPDIF clock are not that
much slower and FDCAN is also unaffected.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Remove the unnecessary file stm32mp157-pinctrl.dtsi and
solve all issues introduced by the commit 891483186052b2598 ("Merge branch
'next'") after a conflict on the patch applied in the next branch in
commit 1a4f57c895cc ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1")
Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches
applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04
- commit 4fdbe6487daa ("ARM: dts: stm32: Add alternate pinmux for SDMMC1
direction pins")'
- commit 5fdcba64027f ("ARM: dts: stm32: Add alternate pinmux for SDMMC2
pins 4-7")'
- commit 955de5111112 ("ARM: dts: stm32: Add alternate pinmux for ethernet
RGMII")'
Cc: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
dm: pinctrl: Use right device pointer for configuring pinctrl
commit 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree")
converted pinctrl driver to livetree. In this conversion, the call to
read pinctrl-single,pins/bits property is provided with pinctrl device
pointer instead of pinctrl config pointer. Because of this none of the
pins gets configured. Fix it by passing the right udevice pointer.
Fixes: 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree") Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
- Adds few DT related fixes required for Linux EFI stub to work on
RISC-V.
- Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7.
- Revert "riscv: qemu: clear kernel-start/-end in device tree as
workaround for BBL"
- Remove unnecessary CONFIG_IS_ENABLED().
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
riscv: Provide a mechanism to fix DT for reserved memory
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
In U-Boot, the reserved memory end address is considered as a inclusive
address. This notion is followed while adding a reserved memory node to
the DT.
For example:
end_address = start_address + size - 1
Follow the same notion and fix the end address computation while checking
for existing nodes.
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Linux booting protocol mandates that register "a0" contains the hartid.
However, U-Boot can not pass the hartid via a0 during standard UEFI
protocol. DT nodes are commonly used to pass such information to the OS.
Add a DT node under chosen node to indicate the boot hartid. EFI stub
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 16 Apr 2020 15:09:32 +0000 (08:09 -0700)]
riscv: Add Kconfig option for SBI v0.2
SBI v0.2 is more scalable and extendable to handle future needs
for RISC-V supervisor interfaces. For example, with SBI v0.2 HSM
extension, only a single hart need to boot and enter operating
system. The booting hart can bring up secondary harts one by one
afterwards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Bin Meng [Thu, 16 Apr 2020 15:09:31 +0000 (08:09 -0700)]
riscv: Add SMP Kconfig option dependency for U-Boot proper
U-Boot proper running in S-mode only need SMP support when using
SBI v0.1. With SBI v0.2 HSM extension, it does not need implement
multicore boot in U-Boot proper.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Bin Meng [Thu, 16 Apr 2020 15:09:30 +0000 (08:09 -0700)]
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
With SBI v0.2 HSM extension, only a single hart need to boot and
enter operating system. The booting hart can bring up secondary
harts one by one afterwards.
For U-Boot running in SPL, SMP can be turned on, while in U-Boot
proper, SMP can be optionally turned off if using SBI v0.2 HSM.
Introduce a new SPL_SMP Kconfig option to support this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Bin Meng [Thu, 16 Apr 2020 15:09:28 +0000 (08:09 -0700)]
riscv: qemu: Remove the simple-bus driver for the SoC node
Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a
"riscv-virtio-soc" compatible string, and a "simple-bus" driver
was created to accommodate that special case in U-Boot.
Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus",
hence the special simple-bus driver is no longer needed.
Update the doc to mention the latest tested QEMU version 4.2.0.
Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL"
The commit was added as a workaround required in QEMU when using BBL as
the supervisor binary interface (SBI) for Linux. We are now using
OpenSBI to provide the SBI, the workaround is therefore not required
anymore and can be removed.
Tom Rini [Wed, 22 Apr 2020 12:58:41 +0000 (08:58 -0400)]
Merge tag 'mmc-2020-4-22' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- iproc_sdhci memory leak fix and enable R1B resp quirk
- more mmc cmds and several mmc updates from Heinirich
- Use bounce buffer for tmio sdhci
- Alignment check for tmio sdhci
Harald Seiler [Wed, 15 Apr 2020 09:33:31 +0000 (11:33 +0200)]
spl: mmc: Rename spl_boot_partition() to spl_mmc_boot_partition()
This function is only relevant to the MMC driver so calling it
spl_boot_partition() might be confusing. Rename it to
spl_mmc_boot_partition() to make its purpose more clear (and bring
it in line with spl_mmc_boot_mode()).
Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Harald Seiler [Wed, 15 Apr 2020 09:33:30 +0000 (11:33 +0200)]
spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()
The function's name is misleading as one might think it is used
generally to select the boot-mode when in reality it is only used by the
MMC driver to find out in what way it should try reading U-Boot Proper
from a device (either using a filesystem, a raw sector/partition, or an
eMMC boot partition).
Rename it to spl_mmc_boot_mode() to make it more obvious what this
function is about.
Marek Vasut [Sat, 4 Apr 2020 10:45:06 +0000 (12:45 +0200)]
mmc: tmio: sdhi: Implement get_b_max function
Implement get_b_max() for the Renesas R-Car SDHI controller driver, limit
the b_max per hardware capabilities such that select Gen2 controllers have
16bit block transfer limit, the rest has 32bit block transfer limit and on
Gen3, the block transfer limit on addresses above the 32bit boundary is set
to 1/4 of the malloc area.
Originally, on Gen3, the block transfers above the 32bit area were limited
to PIO only, which resulted in (R8A7795 Salvator-X , HS200 eMMC):
=> time mmc read 0x0000000700000000 0 0x10000
time: 0.151 seconds
=> time mmc read 0x0000000700000000 0 0x100000
time: 11.090 seconds
with bounce buffer in place and b_max adjustment in place:
=> time mmc read 0x0000000700000000 0 0x10000
time: 0.156 seconds
=> time mmc read 0x0000000700000000 0 0x100000
time: 2.349 seconds
Note that the bounce buffer does mallocate and free the bounce buffer
for every transfer. Experiment which removes this results in further
increase of read speed, from 2.349s to 2.156s per 512 MiB of data,
which is not such a significant improvement anymore. It might however
be interesting to have bounce buffer directly in the MMC core or even
block core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 4 Apr 2020 10:45:05 +0000 (12:45 +0200)]
mmc: Add option to adjust b_max before long read
Add getter function which permits adjusting the maximum number of
blocks that could be read in a single sustained read transfer based
on the location of the source/target buffer and length, before such
transfer starts.
This is mainly useful on systems which have various DMA restrictions
for different memory locations, e.g. DMA limited to 32bit addresses,
and where a bounce buffer is used to work around such restrictions.
Since the U-Boot bounce buffer is mallocated, it's size is limited
by the malloc area size, and the read transfer to such a buffer must
also be limited. However, as not all areas are limited equally, the
b_max should be adjusted accordinly as needed to avoid degrading
performance unnecessarily.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 4 Apr 2020 10:45:04 +0000 (12:45 +0200)]
mmc: tmio: sdhi: Use bounce buffer to avoid DMA limitations
The R-Car SDHI DMA controller has various restrictions. To work around
those restrictions without falling back to PIO, implement bounce buffer
with custom alignment check function which tests for those limitations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 4 Apr 2020 10:45:03 +0000 (12:45 +0200)]
ARM: rmobile: Increase malloc area size
Increase the malloc area size significantly to cater for bounce buffer
used by the SDHI driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 4 Apr 2020 10:45:02 +0000 (12:45 +0200)]
common: bouncebuf: Permit passing custom alignment check function
Add extended version of the bounce_buffer_start(), which permits passing in
a custom alignment checker function for the buffer. This is useful e.g. on
systems with various DMA restrictions and where the checker function might
be more complex than a simple CPU cache alignment check.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Joel Johnson [Fri, 17 Apr 2020 15:38:08 +0000 (09:38 -0600)]
cmd: mvebu: bubt: show image boot device
When a mismatch is found trying to write an image for one boot method
to a different boot device, print an error message including the image
header marked target boot device type.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
Joel Johnson [Fri, 17 Apr 2020 15:38:04 +0000 (09:38 -0600)]
cmd: mvebu: bubt: add A38x support
Add support for Armada 38x devices in bubt flashing utility.
This is based on (and streamlined from) the support in the SolidRun
master-a38x vendor fork.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
Joel Johnson [Fri, 17 Apr 2020 07:19:05 +0000 (01:19 -0600)]
arm: mvebu: correct SPL boot configs for SPI/MMC
Update mvebu SPL boot selection mechanism for the move to driver model
usage by ensuring that the required driver support for SPI and MMC
booting is available in SPL when the respective boot method is
selected.
Previously, all mvebu boards selected a boot method (implicitly
MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used.
This changes mvebu boot method selection to depend on SPL usage which
resolves the issue with aarch64 boards which don't use SPL getting an
implicit boot device selection resulting in unmet dependencies. The
32-bit arm boards do use SPL, but I'm led to conclude that most aren't
intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have
SPL_DM_SPI enabled in their defconfig even though they still implicitly
select the SPI boot method.
This also results in the new addition of SPL_GPIO_SUPPORT to helios4.
The mainline dts for helios4 includes the cd-gpios entry for sdhci with
identical addresses as the clearfog dts. I don't have a helios4 board
to confirm, but based on the current source conclude that the board
itself is either wired to pull the signal low for eMMC, or the default
MMC boot isn't fully functional in mainline. In either case, as far as
I can tell, including the GPIO support will at least cause no
regression.
Tested on SolidRun ClearFog devices.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
Fix duplication resulting from merging of multiple related series.
Commits cecf38a75, bd02fd29f, and 201a500de added or adjusted SCSI
boot support for ClearFog, but in slightly different locations which
didn't result in a merge conflict.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
Register value table for DDR PHY clock divider are wrong. They should be
0 or 1 for divide-by-2 or divide-by-4, respectively. Not 1 or 2. Current
values do not make sense, since 2 cannot be achieved, because the
register is only 1 bit long (mask is set to 1).
This fixes clk dump reporting DDR PHY clock rate differently from Linux.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Thu, 9 Apr 2020 16:49:45 +0000 (10:49 -0600)]
buildman: Change the exit codes
The current exit codes of 128 and 129 are useful in that they do not
conflict with those returned by tools, but they are not actually valid.
It seems better to pick some codes which work with 'bit bisect run'.
Update them to 100 (for errors) and 101 (for warnings).
projects / u-boot.git / log