Godfrey Mwangi [Fri, 4 Aug 2023 19:00:39 +0000 (12:00 -0700)]
usb: xhci: pet watchdog during transfers
On some platforms with low USB throughput, tranfers
of huge files take a long time and watchdog timer can
expire resulting in hardware reset. Avoid this by
petting the watchdog as long as we have pending transfers.
Signed-off-by: Godfrey Mwangi <godmwan@microsoft.com> Reviewed-by: Marek Vasut <marex@denx.de>
Tom Rini [Mon, 14 Oct 2024 14:14:46 +0000 (08:14 -0600)]
Merge tag 'u-boot-amlogic-next-20241014' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- Add Libre Computer boards into proper libre-computer board directory
- Add new Boards:
- Libre Computer aml-s905d3-cc
- Libre Computer aml-a311d-cc
- Add capsule update to libretech-ac and the new boards since they have an onboard SPI nor flash
- Fix HDMI support after sync to v6.11 and regulator enable from Marek
- Fix khadas-vim3 android config for android-mainline kernel
- Disable meson64 boot targets when configs are not eavailable
Tom Rini [Mon, 14 Oct 2024 14:13:23 +0000 (08:13 -0600)]
Merge branch 'u-boot-nand-20241012' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
This merge request add support for BCMBCA raw nand driver for bcm96846
board that switch using OF_UPSTREAM and allow use onfi ecc params when
they are available in the atmel nand controller
The patches pass the pipeline CI:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/22638
Callum Parsey [Sat, 12 Oct 2024 08:03:51 +0000 (08:03 +0000)]
configs: meson64: Ensure commands for boot targets are available
When populating BOOT_TARGET_DEVICES on Amlogic Meson platforms, verify
that the shell commands for accessing the relevant media have been
enabled in the build configuration.
This was already being done for USB, NVME and SCSI devices, but not
for MMC devices or network boot. This meant that configuring U-Boot
without the networking or MMC subsystems/drivers would cause an error
to be thrown during preprocessing.
Neil Armstrong [Wed, 9 Oct 2024 09:15:20 +0000 (11:15 +0200)]
clk: meson: gxbb: add HDMI clocks
Align with g12a driver to handle the CLKID_HDMI, CLKID_HDMI_SEL
and CLKID_HDMI_DIV clocks since they were added to the upstream
GXBB/GXL Devicetree on v6.11 with [1]
Neil Armstrong [Fri, 20 Sep 2024 13:33:34 +0000 (15:33 +0200)]
ARM: meson: add support for Libre Computer aml-s905d3-cc
Add support for the Libre Computer aml-s905d3-cc "Solitude" board:
https://libre.computer/products/aml-s905d3-cc/
The Solitude board has a Credit Card form factor, similar to the
the previous "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.
The board has an embedded SPI NOR flash, and EFI Capsule support
is added.
The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=4302C3CB-2502-5EFE-87E0-894A8A322893
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================
On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 4302C3CB-2502-5EFE-87E0-894A8A322893 -i 1 u-boot.bin u-boot.cap
On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r
Neil Armstrong [Fri, 20 Sep 2024 13:33:33 +0000 (15:33 +0200)]
ARM: meson: add support for Libre Computer aml-a311d-cc
Add support for the Libre Computer aml-a311d-cc "Alta" board:
https://libre.computer/products/aml-a311d-cc/
The Alta board has a Credit Card form factor, similar to the
the prvevious "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.
The board has an embedded SPI NOR flash, and EFI Capsule support
is added.
The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=17E07D9D-4D91-53F4-8780-1D91F279C1A5
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================
On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 17E07D9D-4D91-53F4-8780-1D91F279C1A5 -i 1 u-boot.bin u-boot.cap
On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r
Since the aml-s805-cc works well using EFI, and now the capsule updates
backend has been merged, let's enable the missing configs and add
the required structures to support it.
The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=B8079027-9B2C-57D4-86AA-CC782ADA598C
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================
On the host (with the aml_encrypt_gxl result binary):
$ eficapsule --guid B8079027-9B2C-57D4-86AA-CC782ADA598C -i 1 u-boot.bin u-boot.cap
On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r
Neil Armstrong [Tue, 17 Sep 2024 12:34:45 +0000 (14:34 +0200)]
board: libretech-ac: move board support into dedicated directory
The libretech-ac aka aml-s805x-ac supports mainline U-boot
from a dedicated SPI flash, move the board support into
a dedicated vendor/board subdirectory in order to support
vendor specific customization.
It also aligns with the vendor downstream changes.
Neil Armstrong [Tue, 10 Sep 2024 09:50:11 +0000 (11:50 +0200)]
ufs: add get_max_pwr_mode callback
Add a new get_max_pwr_mode callback to permit the UFS controller
driver manipulate the max_pwr_mode struct right before setting
the new pwr_mode to the UFS device.
It can be used to limit the HS Gear with errata and hardware
limitations on some UFS controllers.
ufs: ufs-amd-versal2: Add support for AMD UFS controller
Add UFS AMD platform support on top of the UFS DWC
and UFS platform driver. UFS AMD platform requires
some platform specific configurations like M-PHY/RMMI/UniPro
and vendor specific registers programming before doing the LINKSTARTUP.
This patch has the goal to add support for DesignWare UFS Controller
specific operations.
This is based on linux kernel commit:
"drivers/scsi/ufs/ufshcd-dwc.c: ufs: add support for DesignWare
Controller" (sha1: 4b9ffb5a353bdee49f1f477ffe2b95ab3f9cbc0c)
It is ported from linux kernel 6.11-rc1.
Neil Armstrong [Mon, 30 Sep 2024 12:44:35 +0000 (14:44 +0200)]
MAINTAINERS: Add myself to the list of UFS maintainers
Adding myself to continue Bhupesh's work to enhance and fix UFS
support in U-Boot, especially for Qualcomm SoCs, and help review
patches and maintain the UFS subsystem.
Neil Armstrong [Mon, 30 Sep 2024 12:44:34 +0000 (14:44 +0200)]
ufs: core: remove link_startup_again logic
The link_startup_again logic was added in Linux to handle device
that were set in LinkDown state, which should not be the case since U-boot
doesn't set LinkDown state are init, and Linux sets the device active
in ufshcd_init() for the first link startup.
ufshcd_set_ufs_dev_active(hba) is called at ufshcd_init() right before
scheduling an ufshcd_async_scan that will call ufshcd_device_init() then ufshcd_link_startup().
The comment in probe says:
/*
* We are assuming that device wasn't put in sleep/power-down
* state exclusively during the boot stage before kernel.
* This assumption helps avoid doing link startup twice during
* ufshcd_probe_hba().
*/
we can assume the same from U-Boot.
While it worked to far, it breaks link startup for Qualcomm Controllers v5,
let's just remove the logic.
ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP
Clear UECPA once in u-boot UFS driver due to LINERESET has happened
during LINK_STARTUP. This makes the u-boot ufs driver behavior related
to UECPA similar to Linux UFS driver.
Ported from Linux kernel commit: 2355b66ed20c ("scsi: ufs: Handle LINERESET indication in err handler")
Marek Vasut [Mon, 30 Sep 2024 12:44:27 +0000 (14:44 +0200)]
ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not
support 64-bit addressing.
Ported from Linux kernel commit 6554400d6f66 ("scsi: ufs: core: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS")
with ufs_scsi_buffer_aligned() based on U-Boot generic bounce buffer.
Neil Armstrong [Mon, 30 Sep 2024 12:44:25 +0000 (14:44 +0200)]
ufs: split flush and invalidate to only invalidate when required
There is no need to flush and invalidate all data updated by the
driver, mainly because on ARM platforms flush also invalidates
the cachelines.
Split the function in two and add the appropriate cacheline
invalidates after the UFS DMA operation finishes to make sure
we read from memory.
Flushing then invalidating cacheline unaligned data causes data
corruption issues on Qualcomm platforms, and is largely unnecessary
anyway, so let's cleanup the cache operations.
Tom Rini [Mon, 14 Oct 2024 02:25:41 +0000 (20:25 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to
use OF_UPSTREAM. We are doing it for this SoC family only since the DTs
between the U-Boot and the kernel repo are exactly identical, whereas other
families have one compatibility fix in U-Boot to allow booting older kernels.
Other will follow if this plays out well.
The biggest chunk otherwise is adding support for an Anbernic game console,
using the H700 SoC. For that we need to enhance the DRAM support code, and
pick two DT commits from the mainline kernel/DT rebasing repo, followed
by the defconfig patch.
On top of that two small fixes for the old Allwinner A80.
Gitlab CI passed, and I booted that briefly on some boards, including an
H616 and an H618 one (with LPDDR4).
Tom Rini [Sun, 13 Oct 2024 16:19:05 +0000 (10:19 -0600)]
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.
This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 2560×1600
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.
Jonas Schwöbel [Mon, 22 Jan 2024 12:40:27 +0000 (14:40 +0200)]
Tegra30: Add funcmux for UART over SD slot
Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
header
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
TegraPT is compatible with EFI part but it can't pass Protective MBR check.
Skip this check if CONFIG_TEGRA_PARTITION is enabled, storage uclass is MMC
and devnum is 0. Note, eMMC on supported devices MUST be aliased to mmc0.
Peng Fan [Sat, 12 Oct 2024 09:34:10 +0000 (17:34 +0800)]
clk: imx8mp: Add i.MX8MP Dummy clk
i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk
api will return failure.
The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device
tree. This will be done in Kernel device tree and sync to U-Boot in
future:
https://lore.kernel.org/all/20241012025221.1728438-1-peng.fan@oss.nxp.com/
Brian Ruley [Tue, 1 Oct 2024 13:58:09 +0000 (16:58 +0300)]
binman: add fast authentication method for i.MX8M signing
Using the PKI tree with SRKs as intermediate CA isn't necessary or even
desirable in some situations (boot time, for example). Add the possibility
to use the "fast authentication" method where the image and CSF are both
signed using the SRK [1, p.63].
Simplify code and conform to the style guide used in the project by
making the following changes:
* Capitalize global constants
* Use single quotes for multiline strings (except docstrings)
* Fix line width to 79 cols
* Use f-string instead of formatting a regular string or using a
complicated concatenation
* Move common suffix used in keys to a global variable "KEY_NAME"
to reduce the likelihood of typos and making future changes
easier
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com> Cc: Marek Vasut <marex@denx.de>
Ye Li [Sun, 6 Oct 2024 00:30:05 +0000 (08:30 +0800)]
misc: fuse: Update fuse driver
When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.
Add ELE shadow fuse read and write to current ELE fuse driver.
But when LC is OEM closed, the ELE read/write shadow fuse APIs are
forbidden. Reading from any fuse will return error. This causes
problem to u-boot which must read out some fuse no matter whatever LC.
So we have to change back to read from FSB and ELE common fuse read API.
For using ELE shadow read API for development purpose like checking
the ELE shadow fuse write result, user can set env variable
"enable_ele_shd" to y to switch it.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Sun, 6 Oct 2024 00:30:04 +0000 (08:30 +0800)]
misc: fuse: Fix FSB redundancy fuse word check and clear res
There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.
And When calling ELE API, res parameter will pass to ELE API to get ELE
response value for failure. So most of usage does not initialize
this variable and print it after calling ELE API.
However, when ELE API returns failure, we can't ensure this res is
always set because there may be other failure like MU failure.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Sun, 6 Oct 2024 00:30:02 +0000 (08:30 +0800)]
misc: ele_api: Update ELE read common fuse API
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.
Peng Fan [Sun, 6 Oct 2024 00:22:51 +0000 (08:22 +0800)]
misc: ele_mu: Clear RR when initialize MU
When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.
Cc: Alice Guo <alice.guo@nxp.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Sun, 6 Oct 2024 00:22:50 +0000 (08:22 +0800)]
misc: ele_mu: Update ELE MU to get TR/RR number from HW
The MU parameter register can provide the TR and RR number.
For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
so update the driver to read the PAR for exact TR and RR number.
Also update compatible string for i.MX95 ELE MU.
Cc: Alice Guo <alice.guo@nxp.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Linus Walleij [Fri, 11 Oct 2024 14:49:56 +0000 (16:49 +0200)]
board: bcm96846: Enable NAND options
This adds reasonable NAND options to the BCM96846 reference design:
- CMD_NAND, MTD_RAW_NAND
- Disable SYS_NAND_ONFI_DETECTION as this just give error messages
- MTD, MTDPARTS with DM and related config options
- CMD_UBI and CMD_UBIFS as this is likely used with ubi/ubifs
What I didn't add was something like the following:
Because I don't actually have a BCM96846 reference design. These
are only available to Broadcom and their customers I think,
but perhaps the people at Broadcom can provide the detail of
the flash layout for BCM96846 so we can add this too so the
bcm96846_config is usable out of the box.
Linus Walleij [Fri, 11 Oct 2024 14:49:54 +0000 (16:49 +0200)]
mtd: rawnand: brcmnand: Add BCMBCA RAW NAND driver
The Broadcom BCA platforms are broadband access SoCs.
This is a port of the upstream Linux driver to U-Boot.
It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
from Linux v6.11.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Zixun LI [Sun, 21 Jul 2024 21:45:52 +0000 (23:45 +0200)]
mtd: nand: raw: atmel: Use ONFI ECC params if available
When ECC parameters are not specified in DT, first try ONFI ECC parameters
before fallback to maximum strength.
It's the Linux driver behavior since the driver rewriting in f88fc12.
From then 2 nand system refactors have been done in 6a1b66d6 and 53576c7b,
chip->ecc_strength_ds and chip->ecc_step_ds became
nanddev_get_ecc_requirements(). U-Boot didn't follow the refactor and
always use these 2 fields.
v2: Fix formatting, add upstream commit hash.
Signed-off-by: Zixun LI <zli@ogga.fr> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Balamanikandan Gunasundar
Tom Rini [Fri, 11 Oct 2024 18:23:25 +0000 (12:23 -0600)]
Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:
When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL
Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.
For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:
In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.
This series starts a change in terminology and usage to resolve the
above issues:
- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_
It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.
This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.
The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
projects / u-boot.git / log