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9 months agoboard: rockchip: Add support for rk3588s based Cool Pi 4B
Andy Yan [Sat, 17 Feb 2024 11:24:59 +0000 (19:24 +0800)]
board: rockchip: Add support for rk3588s based Cool Pi 4B

CoolPi 4B is a rk3588s based SBC.

Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header

The dts is from linux-6.8 rc1.

Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/

9 months agorockchip: nanopi-r4s: Drop ROCKCHIP_OTP
Chen-Yu Tsai [Mon, 12 Feb 2024 13:51:08 +0000 (21:51 +0800)]
rockchip: nanopi-r4s: Drop ROCKCHIP_OTP

The NanoPi R4S has an RK3399 SoC, which has efuse supported by
ROCKCHIP_EFUSE, not ROCKCHIP_OTP.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
9 months agorockchip: rk3399: regenerate defconfigs
Chen-Yu Tsai [Mon, 12 Feb 2024 13:51:07 +0000 (21:51 +0800)]
rockchip: rk3399: regenerate defconfigs

Regenerate RK3399 defconfigs after adding imply statements.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: rk3328: regenerate defconfigs
Chen-Yu Tsai [Mon, 12 Feb 2024 13:51:06 +0000 (21:51 +0800)]
rockchip: rk3328: regenerate defconfigs

Regenerate RK3328 defconfigs after adding imply statements.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
9 months agorockchip: rk3399: Read cpuid and generate MAC address from efuse
Chen-Yu Tsai [Mon, 12 Feb 2024 13:51:05 +0000 (21:51 +0800)]
rockchip: rk3399: Read cpuid and generate MAC address from efuse

The rockchip-efuse driver supports the efuse found on RK3399. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.

Enable the driver and reading cpuid by default for RK3399.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
9 months agorockchip: rk3328: Read cpuid and generate MAC address from efuse
Chen-Yu Tsai [Mon, 12 Feb 2024 13:51:04 +0000 (21:51 +0800)]
rockchip: rk3328: Read cpuid and generate MAC address from efuse

The rockchip-efuse driver supports the efuse found on RK3328. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.

Enable the driver and reading cpuid by default for RK3328.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
9 months agorockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash
Jonas Karlman [Sat, 17 Feb 2024 00:22:41 +0000 (00:22 +0000)]
rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash

Add Kconfig options to enable support for booting from SPI NOR flash on
Orange Pi R1 Plus boards.

The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.

  => sf probe
  SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1376768 bytes read in 66 ms (19.9 MiB/s)

  => sf update ${fileaddr} 0 ${filesize}
  device 0 offset 0x0, size 0x150200
  1126912 bytes written, 249856 bytes skipped in 14.22s, speed 100542 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-rock64: Enable boot from SPI NOR flash
Jonas Karlman [Sat, 17 Feb 2024 00:22:40 +0000 (00:22 +0000)]
rockchip: rk3328-rock64: Enable boot from SPI NOR flash

Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.

The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.

  => sf probe
  SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1359872 bytes read in 65 ms (20 MiB/s)

  => sf update ${fileaddr} 0 ${filesize}
  device 0 offset 0x0, size 0x14c000
  1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328: Add support to build bootable SPI image
Jonas Karlman [Sat, 17 Feb 2024 00:22:39 +0000 (00:22 +0000)]
rockchip: rk3328: Add support to build bootable SPI image

Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as it does for SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agoRevert "rockchip: Allow booting from SPI"
Jonas Karlman [Sat, 17 Feb 2024 00:22:38 +0000 (00:22 +0000)]
Revert "rockchip: Allow booting from SPI"

This reverts commit 3523c07867b403d5b3b68812aebac8a5afa5be4c.

Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328: Sync device tree from linux v6.8-rc1
Jonas Karlman [Sat, 17 Feb 2024 00:22:37 +0000 (00:22 +0000)]
rockchip: rk3328: Sync device tree from linux v6.8-rc1

Sync rk3328 device tree from linux v6.8-rc1.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorng: rockchip: Use same compatible as linux
Jonas Karlman [Sat, 17 Feb 2024 00:22:36 +0000 (00:22 +0000)]
rng: rockchip: Use same compatible as linux

Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agogpio: rockchip: Use gpio alias id as gpio bank id
Jonas Karlman [Sat, 17 Feb 2024 00:22:35 +0000 (00:22 +0000)]
gpio: rockchip: Use gpio alias id as gpio bank id

The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.

This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.

Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC
Jonas Karlman [Sat, 17 Feb 2024 00:22:34 +0000 (00:22 +0000)]
rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC

When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:

  U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000)
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC2
  Card did not respond to voltage select! : -110
  spl: mmc init failed with error: -95
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-orangepi-r1-plus: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:33 +0000 (00:22 +0000)]
rockchip: rk3328-orangepi-r1-plus: Update defconfig

Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.

Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-nanopi-r2: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:32 +0000 (00:22 +0000)]
rockchip: rk3328-nanopi-r2: Update defconfig

Update defconfig for rk3328-nanopi-r2* boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add DM_REGULATOR_GPIO=y and SPL_DM_REGULATOR_GPIO=y to support the
regulator-gpio compatible.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-rock-pi-e: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:31 +0000 (00:22 +0000)]
rockchip: rk3328-rock-pi-e: Update defconfig

Update defconfig for rk3328-rock-pi-e with new defaults.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_MDIO=y to ensure device tree props can be used by PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-roc-cc: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:30 +0000 (00:22 +0000)]
rockchip: rk3328-roc-cc: Update defconfig

Update defconfig for rk3328-roc-cc with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-rock64: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:29 +0000 (00:22 +0000)]
rockchip: rk3328-rock64: Update defconfig

Update defconfig for rk3328-rock64 with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328-evb: Update defconfig
Jonas Karlman [Sat, 17 Feb 2024 00:22:28 +0000 (00:22 +0000)]
rockchip: rk3328-evb: Update defconfig

Update defconfig for rk3328-evb with new defaults.

Add DM_RESET=y to support using reset signals.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.

Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Add SYSINFO=y to support the sysinfo uclass.

Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: rk3328: Update default u-boot, spl-boot-order prop
Jonas Karlman [Sat, 17 Feb 2024 00:22:27 +0000 (00:22 +0000)]
rockchip: rk3328: Update default u-boot, spl-boot-order prop

Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: ringneck_px30: update website link
Quentin Schulz [Mon, 11 Mar 2024 12:02:03 +0000 (13:02 +0100)]
rockchip: ringneck_px30: update website link

The original link returns a custom 404, so let's point to a link that
works today instead.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: ringneck_px30: migrate README to doc/board in rST format
Quentin Schulz [Mon, 11 Mar 2024 12:02:02 +0000 (13:02 +0100)]
rockchip: ringneck_px30: migrate README to doc/board in rST format

This migrates the plaintext README in
board/theobroma-systems/ringneck_px30 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: rk3399-puma: migrate README to doc/board in rST format
Quentin Schulz [Mon, 11 Mar 2024 12:02:01 +0000 (13:02 +0100)]
rockchip: rk3399-puma: migrate README to doc/board in rST format

This migrates the plaintext README in
board/theobroma-systems/puma_rk3399 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: puma-rk3399: MAINTAINERS: use glob for dtses
Quentin Schulz [Mon, 11 Mar 2024 12:02:00 +0000 (13:02 +0100)]
rockchip: puma-rk3399: MAINTAINERS: use glob for dtses

There are multiple Device Trees in U-Boot git repo for Puma, so let's
make the MAINTAINERS entry match them all.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agoboard: rockchip: add Theobroma-Systems RK3588 Jaguar SBC
Quentin Schulz [Mon, 11 Mar 2024 12:01:59 +0000 (13:01 +0100)]
board: rockchip: add Theobroma-Systems RK3588 Jaguar SBC

JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and
is targeting Autonomous Mobile Robots (AMR).

It features:
 * LPDDR4X (up to 16GB)
 * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
 * PCIe 3.0 4-lane on M.2 M-key connector
 * PCIe 2.1 1-lane on M.2 E-key
 * USB 2.0 on M.2 E-key
 * 2x USB3 OTG type-c ports with DP Alt-Mode
 * USB2 host port
 * HDMI output
 * 2x camera connectors, each exposing:
   * 2-lane MIPI-CSI
   * 1v2, 1v8, 2v8 power rails
   * I2C bus
   * GPIOs
 * PPS input
 * CAN
 * RS485 UART
 * FAN connector
 * SD card slot
 * eMMC (up to 256GB)
 * RTC backup battery
 * Companion microcontroller
   * ISL1208 RTC emulation
   * AMC6821 PWM emulation
   * On/off buzzer control
 * Secure Element
 * 80-pin Mezzanine connector for daughterboards:
   * GPIOs
   * 1Gbps Ethernet
   * PCIe 2.1 1-lane
   * 2x 2-lane MIPI-CSI
   * ADC channel
   * I2C bus
   * PWM
   * UART
   * SPI
   * SDIO
   * CAN
   * I2S
   * 1v8, 3v3, 5v0, dc-in (12-24V) power rails

The Device Tree comes from next-20240110 Linux kernel.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: rk3588: bind MMC controllers in U-Boot proper pre-reloc
Quentin Schulz [Mon, 11 Mar 2024 12:01:58 +0000 (13:01 +0100)]
rockchip: rk3588: bind MMC controllers in U-Boot proper pre-reloc

Since commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper
bind the device before relocation.

While this is usually not much of an issue, it is when there's a lookup
for devices by code running before the relocation. Such is the case of
env_init() which calls env_driver_lookup() which calls
env_get_location() which is a weak symbol and may call
arch_env_get_location() also a weak symbol. Those are two functions that
may traverse UCLASS to find some devices (e.g.
board/theobroma-systems/common/common.c:arch_env_get_location()).

This allows something in the env_init() call stack to be able to use
uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the
behavior with what seems to be all SoCs except RK356x family.

Additionally, if any other env function (e.g. env_load) were to be used
before relocation, this is also required as otherwise it wouldn't be
able to find the MMC device(s).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h
Quentin Schulz [Mon, 11 Mar 2024 12:01:57 +0000 (13:01 +0100)]
rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h

The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.

While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: migrate hardware.h inclusion into appropriate files
Quentin Schulz [Mon, 11 Mar 2024 12:01:56 +0000 (13:01 +0100)]
rockchip: migrate hardware.h inclusion into appropriate files

hardware.h is only defining macros which are "wrappers" around writel().

writel() is however not available in hardware.h, <asm/io.h> needs to be
included. This means in order to use the wrappers in hardware.h, one
also needs to include the <asm/io.h> header.

However, this cannot be done currently because hardware.h is included in
include/configs files, which are implicitly included by every code file
by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
fail because ALIGN (the ARM assembly directive) got redefined by some
of the include files coming from <asm.io.h>.

Because nothing in the include/configs file actually use hardware.h,
let's remove the inclusion of hardware.h from the include/configs files
and explicitly add it wherever it is required.

This prepares for the next commit where <asm/io.h> will be included in
hardware.h.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: rk3588: add constants for some register address spaces
Quentin Schulz [Mon, 11 Mar 2024 12:01:55 +0000 (13:01 +0100)]
rockchip: rk3588: add constants for some register address spaces

It's one thing to have the register mapped via a well-defined struct but
it's another to be able to make use of it. For that to happen, one needs
to cast the physical address memory of the beginning of the register
address space with the struct. Since this cannot change, let's hardcode
it in the include files so that users do not need to duplicate this line
of code in their own implementation.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: rk3588: disable force_jtag by default
Quentin Schulz [Mon, 11 Mar 2024 12:01:54 +0000 (13:01 +0100)]
rockchip: rk3588: disable force_jtag by default

Rockchip SoCs can automatically switch between jtag and sdmmc based on
the following rules:
- all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF,
- force_jtag bit in GRF is 1,
- SDMMC_DET is low (no card detected),

Note that the BootROM may mux all SDMMC pins in their SDMMC function or
not, depending on the boot medium that were tried.

Because SDMMC_DET pin is not guaranteed to be used as an SD card card
detect pin, it could be low at boot or even switch at runtime, which
would enable the jtag function and render the SD card unusable.

This is the case for RK3588 Jaguar for example which has an SD card
connector without an SD card card detect signal and has SDMMC_DET
connected to ground.

Because enabling JTAG at runtime could be a security issue and also to
make sure that we have a consistent behavior on all boards by default,
let's disable this force_jtag feature.

However, let's make it easy to reenable it for debugging purposes by
hiding it behind a Kconfig symbol.

Note that soc_con[0] is reserved. But considering that it's way more
user-friendly to access soc_con1 from the TRM with soc_con[1] than
soc_con[0], and that soc_con0 would actually be located at 4 bytes
before soc_con1, let's just make soc_con0 part of the soc_con array.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
9 months agorockchip: transform rockchip_capsule_update_board_setup into a weak function symbol
Quentin Schulz [Mon, 11 Mar 2024 12:01:53 +0000 (13:01 +0100)]
rockchip: transform rockchip_capsule_update_board_setup into a weak function symbol

There's only one user of rockchip_capsule_update_board_setup, which is
in board.c, and only one board defines it, so instead of having a header
only for one function symbol, let's just use a weak symbol instead.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: merge misc.c into board.c
Quentin Schulz [Mon, 11 Mar 2024 12:01:52 +0000 (13:01 +0100)]
rockchip: merge misc.c into board.c

The functions aren't used anywhere else than in board.c, therefore,
let's not expose them anymore at all.

This merges misc.c and board.c together and removes the functions from
the misc.h header file.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: theobroma-systems: ringneck: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:51 +0000 (13:01 +0100)]
rockchip: theobroma-systems: ringneck: migrate to rockchip_early_misc_init_r

Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: theobroma-systems: puma: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:50 +0000 (13:01 +0100)]
rockchip: theobroma-systems: puma: migrate to rockchip_early_misc_init_r

Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:49 +0000 (13:01 +0100)]
rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r

Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: pine64: pinephone-pro: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:48 +0000 (13:01 +0100)]
rockchip: pine64: pinephone-pro: migrate to rockchip_early_misc_init_r

Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.

It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: pine64: pinebook-pro: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:47 +0000 (13:01 +0100)]
rockchip: pine64: pinebook-pro: migrate to rockchip_early_misc_init_r

Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.

It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: google: gru: migrate to rockchip_early_misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:46 +0000 (13:01 +0100)]
rockchip: google: gru: migrate to rockchip_early_misc_init_r

Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: add weak function symbol called at the beginning of misc_init_r
Quentin Schulz [Mon, 11 Mar 2024 12:01:45 +0000 (13:01 +0100)]
rockchip: add weak function symbol called at the beginning of misc_init_r

Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agorockchip: avoid out-of-bounds when computing cpuid
Quentin Schulz [Mon, 11 Mar 2024 12:01:44 +0000 (13:01 +0100)]
rockchip: avoid out-of-bounds when computing cpuid

The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.

Instead of using hardcoded values, derive them from cpuid_length.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 months agoMerge tag 'v2024.04-rc4' into next
Tom Rini [Mon, 11 Mar 2024 17:40:06 +0000 (13:40 -0400)]
Merge tag 'v2024.04-rc4' into next

Prepare v2024.04-rc4

9 months agoPrepare v2024.04-rc4
Tom Rini [Mon, 11 Mar 2024 17:11:46 +0000 (13:11 -0400)]
Prepare v2024.04-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
9 months agoMerge tag 'u-boot-imx-master-20240311' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 11 Mar 2024 13:22:44 +0000 (09:22 -0400)]
Merge tag 'u-boot-imx-master-20240311' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

- Use TF-A on imx8mp_beacon to fix boot regression.
- Use latest 6.8 dts for imx8mp_beacon.
- Fix the RAM initialization for phycore_imx8mp PCL-070 rev 1.
- Describe the 0087 i.mx8m mini product variant in tdx-cfg-block.

9 months agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 11 Mar 2024 13:05:01 +0000 (09:05 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
9 months agoarm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
Adam Ford [Sun, 10 Mar 2024 16:59:01 +0000 (11:59 -0500)]
arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8

The device tree has evolved over time, so re-sync.  This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver.  However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
9 months agotoradex: tdx-cfg-block: add 0087 i.mx8m mini product variant
Joao Paulo Goncalves [Fri, 8 Mar 2024 14:18:01 +0000 (11:18 -0300)]
toradex: tdx-cfg-block: add 0087 i.mx8m mini product variant

Add new product id 0087 Verdin iMX8M Mini Quad 2GB IT.

Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
9 months agoconfigs: imx8mp_beacon: Fall back to using TF-A
Adam Ford [Thu, 7 Mar 2024 11:58:58 +0000 (05:58 -0600)]
configs: imx8mp_beacon: Fall back to using TF-A

When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.

Fixes: ab53bd43dbde ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
9 months agoboard: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1
Benjamin Hahn [Wed, 6 Mar 2024 16:18:32 +0000 (17:18 +0100)]
board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1

We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
9 months agoboard: phytec: common: phytec_som_detection: Add phytec_get_som_type
Benjamin Hahn [Wed, 6 Mar 2024 16:18:31 +0000 (17:18 +0100)]
board: phytec: common: phytec_som_detection: Add phytec_get_som_type

Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
9 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Sat, 9 Mar 2024 16:29:48 +0000 (11:29 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb

- Singular quirk DT property rename.

9 months agonet: phy: Use PHY MDIO address from DT if available
Marek Vasut [Sun, 28 Jan 2024 01:19:40 +0000 (02:19 +0100)]
net: phy: Use PHY MDIO address from DT if available

In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
9 months agoMerge branch '2024-03-07-assorted-fixes' into next
Tom Rini [Thu, 7 Mar 2024 16:56:35 +0000 (11:56 -0500)]
Merge branch '2024-03-07-assorted-fixes' into next

- Add phytec am64x platform, update am65-cpsw and a few other assorted
  fixes.

9 months agocmd: md5sum: use hash_command
Igor Opaniuk [Sat, 2 Mar 2024 15:05:48 +0000 (16:05 +0100)]
cmd: md5sum: use hash_command

Drop old implementation and use hash_command() instead, as
how it's currently done for crc32 and sha1sum cmds.

Test:
=> md5sum 0x60000000 0x200
md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
9 months agoautoboot: Add check for result of malloc_cache_aligned()
Maks Mishin [Thu, 29 Feb 2024 22:32:11 +0000 (01:32 +0300)]
autoboot: Add check for result of malloc_cache_aligned()

Return value of a function 'malloc_cache_aligned'
is dereferenced at autoboot.c:207 without checking for NULL,
but it is usually checked for this function.

Found by RASU JSC.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
9 months agoserial: pl01x: set baudrate when probing
Yang Xiwen [Wed, 28 Feb 2024 10:57:52 +0000 (18:57 +0800)]
serial: pl01x: set baudrate when probing

It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
9 months agonet: am65-cpsw: cpsw_mdio: Switch to proper DM_MDIO framework
Roger Quadros [Wed, 28 Feb 2024 10:35:27 +0000 (12:35 +0200)]
net: am65-cpsw: cpsw_mdio: Switch to proper DM_MDIO framework

Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.

If MDIO_TI_CPSW is not enabled then we continue to
behave like before.

Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
9 months agonet: mdio: Handle bus level GPIO Reset
Roger Quadros [Wed, 28 Feb 2024 10:35:26 +0000 (12:35 +0200)]
net: mdio: Handle bus level GPIO Reset

Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
9 months agodoc: board: phytec: Add phyCORE-AM64x
Wadim Egorov [Wed, 28 Feb 2024 08:42:17 +0000 (09:42 +0100)]
doc: board: phytec: Add phyCORE-AM64x

Add documentation for PHYTEC phyCORE-AM64x SoM.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
9 months agoboard: phytec: am64x: Add PHYTEC phyCORE-AM64x SoM
Wadim Egorov [Wed, 28 Feb 2024 08:42:16 +0000 (09:42 +0100)]
board: phytec: am64x: Add PHYTEC phyCORE-AM64x SoM

Add support for PHYTEC phyCORE-AM64x SoM.

Supported features:
  - 2GB DDR4 RAM
  - eMMC Flash
  - external uSD
  - OSPI NOR Flash
  - debug UART

Product page SoM: https://www.phytec.com/product/phycore-am64x

Device trees were taken from Linux v6.8-rc2.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
9 months agoCheck curve_name for null to avoid crash
Bob Wolff [Tue, 27 Feb 2024 23:57:03 +0000 (15:57 -0800)]
Check curve_name for null to avoid crash

If mixed rsa and ecdsa keys are specified in dtsi, an rsa key can be sent
into the ecdsa verify. Without the ecdsa,curve property, this function will
crash due to lack of checking the null pointer return.

Signed-off-by: Bob Wolff <bob.wolff68@gmail.com>
9 months agoMerge patch series "Move DRAM address of ATF"
Tom Rini [Wed, 6 Mar 2024 14:11:00 +0000 (09:11 -0500)]
Merge patch series "Move DRAM address of ATF"

Andrew Davis <afd@ti.com> says:

Explanation for this series is mostly in [4/6]. First 3
patches should be safe to take independent of the last 3.

9 months agoarm: mach-k3: Move DRAM address of ATF for AM62/AM62a
Andrew Davis [Wed, 14 Feb 2024 16:30:09 +0000 (10:30 -0600)]
arm: mach-k3: Move DRAM address of ATF for AM62/AM62a

The current address of TF-A in DRAM is just below the 512MB address line.
This means if the DRAM in a system is 512MB then TF-A is right at the
end of memory which is often reused, for instance U-Boot relocates itself
here. If a system has less than 512MB then that system wouldn't work at
all as TF-A would fail to load.

To avoid the issues above, move TF-A to the start of DRAM, which doesn't
change from system to system.

As TF-A is position independent, this has no dependency on TF-A. We
also fixup DT as needed when TF-A address is moved, so this change also
has no dependency on Linux and is fully forward/backward compatible.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
9 months agoarm: mach-k3: am62a: Fixup TF-A/OP-TEE reserved-memory node in FDT
Andrew Davis [Wed, 14 Feb 2024 16:30:08 +0000 (10:30 -0600)]
arm: mach-k3: am62a: Fixup TF-A/OP-TEE reserved-memory node in FDT

The address we load TFA and OP-TEE to is configurable by
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are static. Fix that by updating this node when the loaded address
does not match the address in DT.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
9 months agoarm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT
Andrew Davis [Wed, 14 Feb 2024 16:30:07 +0000 (10:30 -0600)]
arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT

The address we load TF-A and OP-TEE to is configurable by Kconfig
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are often statically defined. As these binaries are dynamically loadable,
and in the case of OP-TEE may not even be loaded at all, hard-coding these
addresses is not a hardware description, but rather a configuration.

If the address that U-Boot loaded TF-A or OP-TEE does not match the
address in hard-coded in DT, then fix that node address. This also handles
the case when no reserved memory for these is provided by DT, which is
more correct as explained above.

Add this fixup function, and enable it for AM62.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
9 months agoarm: mach-k3: am62: Enable OF_SYSTEM_SETUP for all boards
Andrew Davis [Wed, 14 Feb 2024 16:30:06 +0000 (10:30 -0600)]
arm: mach-k3: am62: Enable OF_SYSTEM_SETUP for all boards

The fixups provided by ft_system_setup() are applicable for all AM62 based
boards. Select this at the target selection level for all AM62 boards and
remove it from any specific defconfig.

Signed-off-by: Andrew Davis <afd@ti.com>
9 months agoarm: mach-k3: Add config option for setting OP-TEE address
Andrew Davis [Wed, 14 Feb 2024 16:30:05 +0000 (10:30 -0600)]
arm: mach-k3: Add config option for setting OP-TEE address

Much like we have for ATF, OP-TEE has a standard address that we load
it too and run it from. Add a Kconfig item for this to remove some
hard-coding and allow this address to be more easily changed.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
9 months agoarm: mach-k3: Add default ATF location for AM62/AM62a
Andrew Davis [Wed, 14 Feb 2024 16:30:04 +0000 (10:30 -0600)]
arm: mach-k3: Add default ATF location for AM62/AM62a

There is a default ATF load address that is used for devices that have
ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead
of having to override the address in every defconfig, make add a
default for these ATF in DRAM devices.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
9 months agoarm: dts: k3-binman: Make optee optional as requirement
Michael Trimarchi [Mon, 26 Feb 2024 07:14:15 +0000 (08:14 +0100)]
arm: dts: k3-binman: Make optee optional as requirement

Allow boards that use ti_spl_template to not use optee part in
configuration.
Vendor can have module with 256 Mb of memory and they try to optimize
the available memory just using the essential components.
This change allow to remove tee from configuration without binman
fail.

configurations {
default = "conf-0";

conf-0 {
description = "k3-am62_ccm_m3";
firmware = "atf";
loadables = "dm", "spl";
fdt = "fdt-0";
};
};

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
9 months agoMerge patch series "Enable OSPI on j721e"
Tom Rini [Tue, 5 Mar 2024 13:39:54 +0000 (08:39 -0500)]
Merge patch series "Enable OSPI on j721e"

Jonathan Humphreys <j-humphreys@ti.com> says:

This series enables OSPI storage and boot.

9 months agoarm: dts: k3-j721e-sk: Remove OSPI phypattern partition
Jonathan Humphreys [Sat, 24 Feb 2024 00:23:07 +0000 (18:23 -0600)]
arm: dts: k3-j721e-sk: Remove OSPI phypattern partition

The phy calibration pattern partition isn't needed as the Cadence driver isn't
calibrating the phys.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Fixes: 58d61fb5a77e ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")
9 months agoarm: mach-k3: j721e: Enable OSPI boot
Jonathan Humphreys [Sat, 24 Feb 2024 00:23:06 +0000 (18:23 -0600)]
arm: mach-k3: j721e: Enable OSPI boot

Add boot ROM XSPI bootmode, and set to BOOT_DEVICE_SPI if detected.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
9 months agoconfigs: j721e: Enable OSPI memory
Jonathan Humphreys [Sat, 24 Feb 2024 00:23:05 +0000 (18:23 -0600)]
configs: j721e: Enable OSPI memory

Set config values to enable OSPI functionality.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
9 months agoMerge patch series "enable OSPI support on AM64x"
Tom Rini [Tue, 5 Mar 2024 13:39:31 +0000 (08:39 -0500)]
Merge patch series "enable OSPI support on AM64x"

Jonathan Humphreys <j-humphreys@ti.com> says:

This series enables OSPI support for AM64x by setting the proper configs, and DT
entries for SPL.

9 months agoarm: dts: k3-am642-evm/sk: Enable OSPI support in SPL
Jonathan Humphreys [Sat, 24 Feb 2024 00:17:02 +0000 (18:17 -0600)]
arm: dts: k3-am642-evm/sk: Enable OSPI support in SPL

Add bootph DT tags to enable OSPI in SPL.
Set OSPI regs for R5 SPL to address OSPI's boot region.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
9 months agoconfigs: am64x_evm_*_defconfig: Enable OSPI support
Jonathan Humphreys [Sat, 24 Feb 2024 00:17:01 +0000 (18:17 -0600)]
configs: am64x_evm_*_defconfig: Enable OSPI support

Add configs to support OSPI flash.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
9 months agoarch/arm/mach-omap2/omap5/fdt.c: ft_fixup_clocks: use clock-output-names property...
Romain Naour [Mon, 22 Jan 2024 10:30:44 +0000 (11:30 +0100)]
arch/arm/mach-omap2/omap5/fdt.c: ft_fixup_clocks: use clock-output-names property as fallback (kernel 5.19+)

Clock names has been updated in kernel 5.19+ with the removal of
non-standard node names [1]. Due to this change, ft_opp_clock_fixups()
doesn't work anymore since ft_fixup_clocks() is looking to the clock
name and ft_opp_clock_fixups() error out with the following message:

  ft_fixup_clocks failed for DSP voltage domain: <valid offset/length>

We can't use the new clock name since several clock are using the same
generic name "clock". ft_opp_clock_fixups() is looking at the clocks
node in cm_core_aon@0:

/sys/firmware/devicetree/base/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks
  ...
  clock@120
  clock@160
  clock@1a0
  clock@1e0
  clock@210
  clock@234
  clock@284
  clock@2a8
  clock@2d8

When fdt_subnode_offset() fail, we can look at clock-output-names
property as fallback since it contain the previous clock name.

libfdt doesn't provide any support to replace fdt_subnode_offset() by
a new function looking for clock-output-names property instead of the
node name. So we have to implement it in arch/arm/mach-omap2/omap5/fdt.c
for now.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e4920169e7a2a839836d3a0d8cda1bae8caa3056

Cc: Suman Anna <s-anna@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Andrew Davis <afd@ti.com>
Signed-off-by: Romain Naour <romain.naour@skf.com>
9 months agovirtio: fix get_config / set_config for legacy VirtIO targets
Dmitry Baryshkov [Mon, 12 Feb 2024 07:37:08 +0000 (09:37 +0200)]
virtio: fix get_config / set_config for legacy VirtIO targets

The functions virtio_pci_get_config() and virtio_pci_set_config() don't
take the offset into account when reading the config space. For example
this manifests when U-Boot tries to read the MAC address of the VirtIO
networking device. It reads 6 equa bytes instead of the proper addess.

Fix those functions by taking the offset in the config space into
account.

Fixes: 4135e10732a0 ("virtio: Add virtio over pci transport driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
9 months agoMerge patch series "Fix driver for misc/atsha204a"
Tom Rini [Tue, 5 Mar 2024 13:08:31 +0000 (08:08 -0500)]
Merge patch series "Fix driver for misc/atsha204a"

Michał Barnaś <barnas@google.com> says:

Fix the driver to behave like the chip datasheet requires.
Improve wake up function to send low signal on SDA line for at least
60us as chip requires to wake up. Fix sleep function to move the chip
into sleep mode, not into idle mode. Remove unnecessary for loop,
which would never run for more than one iteration.

9 months agomisc: atsha204a: fix wakeup function
Michał Barnaś [Mon, 19 Feb 2024 16:32:04 +0000 (16:32 +0000)]
misc: atsha204a: fix wakeup function

The ATSHA204A chip requires SDA line to go low for at least 60us to
wake up the chip. Previous implementation did not meet this requirement
due to the NAK received on bus and not sending the zeroes.
The function to ignore the NAK and send bytes regardless is not
supported in the u-boot making it impossible to wake up the chip
this way.
Instead, the bus speed, if needed, is set to lowest value and the
message is sent to the address 0x0. This way, the address of zero
makes the SDA line go low for about 80us, meeting the required time
to wake up the chip. The zero length packet is not sent by the i2c,
so the one byte is sent to the transfer function, but only the address
is sent anyway.
After sending the zero address, the bus speed is restored to the
previous value if it was slowed down to wake up the chip.

Signed-off-by: Michał Barnaś <barnas@google.com>
9 months agomisc: atsha204a: fix sleep function
Michał Barnaś [Mon, 19 Feb 2024 16:32:03 +0000 (16:32 +0000)]
misc: atsha204a: fix sleep function

Fix the sleep function to issue the sleep command instead of idle one.

Signed-off-by: Michał Barnaś <barnas@google.com>
9 months agomisc: atsha204a: remove broken for loop
Michał Barnaś [Mon, 19 Feb 2024 16:32:02 +0000 (16:32 +0000)]
misc: atsha204a: remove broken for loop

Some previous commit changed the continue statement to return,
making the for loop used to retry waking up the chip to always
return after one iteration. This commit removes the loop, cleaning
the code a little.

Signed-off-by: Michał Barnaś <barnas@google.com>
9 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Tue, 5 Mar 2024 12:08:55 +0000 (07:08 -0500)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell

- net: mv88e6xxx: fix missing SMI address initialization (Marek)
- mvebu: turris_omnia: Enable networking via ethernet switch (Marek)
- mvebu: helios-4: add config fragment for spi booting et al (Josua)
- rng: Add Turris Mox rTWM RNG driver (Max)

9 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Tue, 5 Mar 2024 12:08:10 +0000 (07:08 -0500)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

One fix makes the reboot more robust on some older board, another one
stabilises the initial clock setup on the A10/A20.
Two patches make sure our DRAM init does not actually change the content
of the DRAM array, which allows to use DRAM for Linux' pstore
functionality.
We get SPI support for U-Boot proper for one more SoC, that patch was
lingering around for a while, and should not affect other SoCs, so I am
merging this now.
As an added bonus, we get the defconfig file for a new board, the DT was
already synced from the kernel tree.

The CI looked happy with changes, and I tested them on five different
boards with different SoCs.

9 months agorng: Add Turris Mox rTWM RNG driver
Max Resch [Thu, 15 Feb 2024 16:57:57 +0000 (17:57 +0100)]
rng: Add Turris Mox rTWM RNG driver

A RNG driver for Armada 3720 boards running the Turris Mox rWTM firmware
from CZ.NIC in the secure processor.

Signed-off-by: Max Resch <resch.max@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
9 months agoboard: helios-4: add config fragment for spi booting
Josua Mayer [Fri, 2 Feb 2024 15:13:34 +0000 (16:13 +0100)]
board: helios-4: add config fragment for spi booting

Add a config fragment with required differences for booting from spi
flash instead of sd-card (default).

Settings for environment location are based on vendor u-boot:
https://github.com/kobol-io/u-boot/blob/helios4/include/configs/helios4.h#L59

The fragment can be applied on top of helios4_defconfig by make:
make helios4_defconfig spiboot.config

Signed-off-by: Josua Mayer <josua@solid-run.com>
9 months agoarm: mvebu: helios4_defconfig: enable setexpr command
Josua Mayer [Fri, 2 Feb 2024 15:13:33 +0000 (16:13 +0100)]
arm: mvebu: helios4_defconfig: enable setexpr command

Update the helios4 defconfig to enable the 'setexpr' command, which is a
default and useful for various complex boot-scripts.

Signed-off-by: Josua Mayer <josua@solid-run.com>
9 months agoarm: dts: armada-38x-solidrun-microsom: configure i2c0 bus
Josua Mayer [Fri, 2 Feb 2024 15:13:32 +0000 (16:13 +0100)]
arm: dts: armada-38x-solidrun-microsom: configure i2c0 bus

SolidRun Armada-388 SoM has an i2c bus supporting on-som eeprom, and
peripherals on a carrier.
armada-38x.dtsi disables this bus by default, it should be enabled by
som or carrier dts.

Linux has moved i2c0 from helios-4 board dts to som dtsi, including
status, pinctrl and clock speed.
Copy these settings from mainline.

This fixes accessing i2c bus from u-boot commandline.

Signed-off-by: Josua Mayer <josua@solid-run.com>
9 months agoarm: mvebu: turris_omnia: Enable networking via ethernet switch
Marek Mojík [Tue, 19 Dec 2023 09:55:55 +0000 (10:55 +0100)]
arm: mvebu: turris_omnia: Enable networking via ethernet switch

The Turris Omnia contains the Marvell 88E6176 ethernet switch. Add
config options and device tree to enable the support.

Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Signed-off-by: Marek Behún <kabel@kernel.org>
9 months agonet: mv88e6xxx: fix missing SMI address initialization
Marek Mojík [Wed, 6 Dec 2023 14:35:56 +0000 (15:35 +0100)]
net: mv88e6xxx: fix missing SMI address initialization

The mv88e6xxx driver does not currently initialize the smi_addr field, but
instead keeps the default zero value. This leads to driver being unusable
on devices where the switch is not on address zero of the mdio bus. Fix
this problem by reading the SMI address from device tree.

Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
9 months agosunxi: restore modified memory
Andrey Skvortsov [Wed, 27 Dec 2023 21:28:43 +0000 (00:28 +0300)]
sunxi: restore modified memory

Current sunxi DRAM initialisation code does several test accesses to the
DRAM array to detect aliasing effects and so determine the correct
row/column configuration. This changes the DRAM content, which breaks
use cases like soft reset and Linux's ramoops mechanism.

Fix this problem by saving and restoring the content of the DRAM cells
that is used for the test writes.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
9 months agosunxi: reorganize mctl_mem_matches_* functions
Andrey Skvortsov [Wed, 27 Dec 2023 21:28:42 +0000 (00:28 +0300)]
sunxi: reorganize mctl_mem_matches_* functions

mctl_mem_matches and mctl_mem_matches_base identical functions. To
avoid code duplication move them to dram_helpers and make
mctl_mem_matches use generic mctl_mem_matches_base.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
9 months agousb: xhci-dwc3: Fix support for dis_enblslpm_quirk
Jonas Karlman [Sat, 2 Mar 2024 13:09:49 +0000 (13:09 +0000)]
usb: xhci-dwc3: Fix support for dis_enblslpm_quirk

No device tree in U-Boot or linux use the wrong spelling used in code.

Use correct property name as defined in dwc3 bindings.

Fixes: 062790f46131 ("usb: xhci-dwc3: Add USB2 PHY configuration")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
9 months agoMerge tag 'u-boot-imx-master-20240304' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 4 Mar 2024 20:41:38 +0000 (15:41 -0500)]
Merge tag 'u-boot-imx-master-20240304' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19817

- Fix i.MX93 OP-TEE support.
- Use the container image for i.MX93 revision A1.
- Fix display regression on opos6uldev.

9 months agoMerge branch '2024-03-04-assorted-TI-K3-updates' into next
Tom Rini [Mon, 4 Mar 2024 17:07:21 +0000 (12:07 -0500)]
Merge branch '2024-03-04-assorted-TI-K3-updates' into next

- Merge assorted TI K3 platform / SoC updates

9 months agoMerge patch series "Introduce initial TI's J784S4 and AM69 support"
Tom Rini [Mon, 4 Mar 2024 17:02:49 +0000 (12:02 -0500)]
Merge patch series "Introduce initial TI's J784S4 and AM69 support"

Apurva Nandan <a-nandan@ti.com> says:

Hello Everyone!

This series will introduce basic support (SD and UART) support for Texas
Instruments J784S4 EVM.

The J784S4 SoC device tree patches are taken from kernel patch submissions
and will be updated as they are accepted and merged to the kernel tree.
All other patches are specific to SPL and u-boot and do not have
dependency on other trees. Appreciate a review for acceptance to u-boot
tree.

Here are some of the salient features of the J784S4 automotive grade
application processor:

The J784S4 SoC belongs to the K3 Multicore SoC architecture
platform, providing advanced system integration in automotive,
ADAS and industrial applications requiring AI at the network edge.
This SoC extends the K3 Jacinto 7 family of SoCs with focus on
raising performance and integration while providing interfaces,
memory architecture and compute performance for multi-sensor, high
concurrency applications.

Some highlights of this SoC are:
* Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs,
  4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for
  deep learning and CNN.
* 3D GPU: Automotive grade IMG BXS-4-64 MC1
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
  and Motion Processing Accelerator (DMPAC)
* Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one
  DPI interface.
* Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports
  support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role
  device subsystems, Up to 20 MCANs, among other peripherals.

See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
for further details: http://www.ti.com/lit/zip/spruj52

In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It
supports the following interfaces:
* 32 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x2 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
  UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances

Schematics: https://www.ti.com/lit/zip/sprr458

AM69 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/1b2c55d0204ff0f5a47ebbc196a97e99/raw/
J784S4 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/5e2ef85ee4322798d22b57a60dc917db/raw/
eMMC UDA moode bootlog: https://gist.githubusercontent.com/apurvanandan1997/3cffada252d50a8aa0c00a91f1f2f856/raw/

9 months agodma: ti: k3-udma: Fix ring_idx to pair k3 nav rings
Udit Kumar [Wed, 21 Feb 2024 14:23:44 +0000 (19:53 +0530)]
dma: ti: k3-udma: Fix ring_idx to pair k3 nav rings

ring_idx was not correctly assigned in case of tflow_id is zero.
Which leads to wrong pairing of DMA for drivers like OSPI.

Fixes: 4312a1dfca26 ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
9 months agodoc: board: ti: k3: Add J784S4 EVM and AM69 SK documentation
Apurva Nandan [Fri, 23 Feb 2024 20:21:53 +0000 (01:51 +0530)]
doc: board: ti: k3: Add J784S4 EVM and AM69 SK documentation

TI K3 J784S4 and AM69 are new additions to the K3 SoC family.
Add documentation about the J784S4 EVM and AM69 SK.

Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
9 months agoboard: ti: rm-cfg: Update rm-cfg to reflect new resource reservation
Vishal Mahaveer [Tue, 20 Feb 2024 20:39:44 +0000 (14:39 -0600)]
board: ti: rm-cfg: Update rm-cfg to reflect new resource reservation

With the latest TIFS firmware, an additional virtual interrupt and
event is reserved for TIFS usage on am62x and am62ax devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
9 months agoconfigs: am69_sk: Add defconfig for AM69 SK board
Dasnavis Sabiya [Fri, 23 Feb 2024 20:21:52 +0000 (01:51 +0530)]
configs: am69_sk: Add defconfig for AM69 SK board

Add defconfig for AM69 SK A72 and R5 configuration.

This inlcudes and modifies the J784S4 EVM defconfigs:
j784s4_evm_a72_defconfig -> am69_sk_a72_defconfig
j784s4_evm_r5_defconfig -> am69_sk_r5_defconfig

Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK