From: Ley Foon Tan Date: Mon, 20 Apr 2020 08:17:27 +0000 (+0800) Subject: arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset X-Git-Url: http://git.dujemihanovic.xyz/html/index.html?a=commitdiff_plain;h=b9d1671829b17f78c47f2d0d42a7f59767cdd84b;p=u-boot.git arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset Offset value for CLKMGR_S10_PERPLL_BYPASS should be 0xb0, fix it. Reported-by: Chee Hong Ang Signed-off-by: Ley Foon Tan --- diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index e710aa2f94..9d2b3babab 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -85,7 +85,7 @@ void cm_basic_init(const struct cm_config * const cfg); #define CLKMGR_S10_MAINPLL_VCOCALIB 0x8c /* Periphpll group */ #define CLKMGR_S10_PERPLL_EN 0xa4 -#define CLKMGR_S10_PERPLL_BYPASS 0xac +#define CLKMGR_S10_PERPLL_BYPASS 0xb0 #define CLKMGR_S10_PERPLL_CNTR2CLK 0xbc #define CLKMGR_S10_PERPLL_CNTR3CLK 0xc0 #define CLKMGR_S10_PERPLL_CNTR4CLK 0xc4