From: Chee Hong Ang Date: Thu, 24 Dec 2020 10:21:05 +0000 (+0800) Subject: net: designware: socfpga: Add ATF support for MAC driver X-Git-Url: http://git.dujemihanovic.xyz/html/index.html?a=commitdiff_plain;h=a90ae0167bd144124b5386567d5475a4516d0c9b;p=u-boot.git net: designware: socfpga: Add ATF support for MAC driver In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c index 939f199b1f..82fdff51da 100644 --- a/drivers/net/dwmac_socfpga.c +++ b/drivers/net/dwmac_socfpga.c @@ -6,6 +6,8 @@ */ #include +#include +#include #include #include #include @@ -17,8 +19,6 @@ #include #include -#include - struct dwmac_socfpga_plat { struct dw_eth_pdata dw_eth_pdata; void *phy_intf; @@ -64,6 +64,32 @@ static int dwmac_socfpga_of_to_plat(struct udevice *dev) return designware_eth_of_to_plat(dev); } +static int dwmac_socfpga_do_setphy(struct udevice *dev, u32 modereg) +{ + struct dwmac_socfpga_plat *pdata = dev_get_plat(dev); + u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift; + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) + u32 index = ((u64)pdata->phy_intf - socfpga_get_sysmgr_addr() - + SYSMGR_SOC64_EMAC0) >> 2; + + u32 id = SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 + index; + + int ret = socfpga_secure_reg_update32(id, + modemask, + modereg << pdata->reg_shift); + if (ret) { + dev_err(dev, "Failed to set PHY register via SMC call\n"); + return ret; + } +#else + clrsetbits_le32(pdata->phy_intf, modemask, + modereg << pdata->reg_shift); +#endif + + return 0; +} + static int dwmac_socfpga_probe(struct udevice *dev) { struct dwmac_socfpga_plat *pdata = dev_get_plat(dev); @@ -71,7 +97,6 @@ static int dwmac_socfpga_probe(struct udevice *dev) struct reset_ctl_bulk reset_bulk; int ret; u32 modereg; - u32 modemask; switch (edata->phy_interface) { case PHY_INTERFACE_MODE_MII: @@ -97,9 +122,9 @@ static int dwmac_socfpga_probe(struct udevice *dev) reset_assert_bulk(&reset_bulk); - modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift; - clrsetbits_le32(pdata->phy_intf, modemask, - modereg << pdata->reg_shift); + ret = dwmac_socfpga_do_setphy(dev, modereg); + if (ret) + return ret; reset_release_bulk(&reset_bulk);