From: Hans de Goede Date: Sun, 10 May 2015 12:10:27 +0000 (+0200) Subject: sunxi: ohci: Add ohci usb host controller support X-Git-Url: http://git.dujemihanovic.xyz/html/index.html?a=commitdiff_plain;h=6a72e804a2b27e95cc7394876cc6a57f29e70817;p=u-boot.git sunxi: ohci: Add ohci usb host controller support This commit adds support for the OHCI companion controller, which makes usb-1 devices directly plugged into to usb root port work. Note for now this switches usb-keyboard support for sunxi back from int-queue support to the old interrupt polling method. Adding int-queue support to the ohci code and switching back to int-queue support is in the works. Signed-off-by: Hans de Goede Acked-by: Marek Vasut Acked-by: Ian Campbell --- diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index c28ee0528f..63c33190b8 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -320,6 +320,8 @@ struct sunxi_ccm_reg { #define CCM_USB_CTRL_PHY0_RST (0x1 << 0) #define CCM_USB_CTRL_PHY1_RST (0x1 << 1) #define CCM_USB_CTRL_PHY2_RST (0x1 << 2) +#define CCM_USB_CTRL_OHCI0_CLK (0x1 << 6) +#define CCM_USB_CTRL_OHCI1_CLK (0x1 << 7) #define CCM_USB_CTRL_PHYGATE (0x1 << 8) /* These 3 are sun6i only, define them as 0 on sun4i */ #define CCM_USB_CTRL_PHY0_CLK 0 diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 04c6d58186..bacd70adf6 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -246,6 +246,8 @@ struct sunxi_ccm_reg { #define CCM_USB_CTRL_PHY0_CLK (0x1 << 8) #define CCM_USB_CTRL_PHY1_CLK (0x1 << 9) #define CCM_USB_CTRL_PHY2_CLK (0x1 << 10) +#define CCM_USB_CTRL_OHCI0_CLK (0x1 << 16) +#define CCM_USB_CTRL_OHCI1_CLK (0x1 << 17) #define CCM_GMAC_CTRL_TX_CLK_SRC_MII 0x0 #define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII 0x1 diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 3b57e56553..4d35d3e5fe 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o +obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o # echi obj-$(CONFIG_USB_EHCI) += ehci-hcd.o diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c new file mode 100644 index 0000000000..e33a8f7ec2 --- /dev/null +++ b/drivers/usb/host/ohci-sunxi.c @@ -0,0 +1,104 @@ +/* + * Sunxi ohci glue + * + * Copyright (C) 2015 Hans de Goede + * + * Based on code from + * Allwinner Technology Co., Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include "ohci.h" + +struct ohci_sunxi_priv { + ohci_t ohci; + int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ + int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */ + int phy_index; /* Index of the usb-phy attached to this hcd */ +}; + +static int ohci_usb_probe(struct udevice *dev) +{ + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); + struct ohci_sunxi_priv *priv = dev_get_priv(dev); + struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev); + + bus_priv->companion = true; + + /* + * This should go away once we've moved to the driver model for + * clocks resp. phys. + */ + if (regs == (void *)(SUNXI_USB1_BASE + 0x400)) { + priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; + priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; + priv->phy_index = 1; + } else { + priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI1; + priv->usb_gate_mask = CCM_USB_CTRL_OHCI1_CLK; + priv->phy_index = 2; + } + + setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); + setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask); +#ifdef CONFIG_SUNXI_GEN_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); +#endif + + sunxi_usb_phy_init(priv->phy_index); + sunxi_usb_phy_power_on(priv->phy_index); + + return ohci_register(dev, regs); +} + +static int ohci_usb_remove(struct udevice *dev) +{ + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct ohci_sunxi_priv *priv = dev_get_priv(dev); + int ret; + + ret = ohci_deregister(dev); + if (ret) + return ret; + + sunxi_usb_phy_power_off(priv->phy_index); + sunxi_usb_phy_exit(priv->phy_index); + +#ifdef CONFIG_SUNXI_GEN_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); +#endif + clrbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask); + clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); + + return 0; +} + +static const struct udevice_id ohci_usb_ids[] = { + { .compatible = "allwinner,sun4i-a10-ohci", }, + { .compatible = "allwinner,sun5i-a13-ohci", }, + { .compatible = "allwinner,sun6i-a31-ohci", }, + { .compatible = "allwinner,sun7i-a20-ohci", }, + { .compatible = "allwinner,sun8i-a23-ohci", }, + { .compatible = "allwinner,sun9i-a80-ohci", }, + { } +}; + +U_BOOT_DRIVER(usb_ohci) = { + .name = "ohci_sunxi", + .id = UCLASS_USB, + .of_match = ohci_usb_ids, + .probe = ohci_usb_probe, + .remove = ohci_usb_remove, + .ops = &ohci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct ohci_sunxi_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c8ebb54f37..222e739461 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -297,6 +297,9 @@ extern int soft_i2c_gpio_scl; #endif #ifdef CONFIG_USB_EHCI +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_OHCI_SUNXI +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #endif @@ -314,7 +317,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_CONSOLE_MUX #define CONFIG_PREBOOT #define CONFIG_SYS_STDIO_DEREGISTER -#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE +#define CONFIG_SYS_USB_EVENT_POLL #endif #if !defined CONFIG_ENV_IS_IN_MMC && \