]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
authorAlexander Dahl <ada@thorsis.com>
Thu, 21 Jul 2022 13:31:21 +0000 (15:31 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 26 Jul 2022 06:39:43 +0000 (08:39 +0200)
After commit 8cca60a2cbf2 ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
README
drivers/fpga/Kconfig
drivers/fpga/virtex2.c

diff --git a/README b/README
index ff0df3797d21e63343c4caadf5093423c710368d..8c31e5c0e395f4541eba443bf984bd2e4eb982d5 100644 (file)
--- a/README
+++ b/README
@@ -1346,9 +1346,6 @@ The following options need to be configured:
                If defined, a function that provides delays in the FPGA
                configuration driver.
 
-               CONFIG_SYS_FPGA_CHECK_CTRLC
-               Allow Control-C to interrupt FPGA configuration
-
                CONFIG_SYS_FPGA_CHECK_ERROR
 
                Check for configuration errors during FPGA bitfile
index 76719517f541f920bdaf282604fd3e1c30603bff..78d9588e4b7da6764c537bafc43a0cf5e63a244d 100644 (file)
@@ -91,4 +91,10 @@ config FPGA_ZYNQPL
          Enable FPGA driver for loading bitstream in BIT and BIN format
          on Xilinx Zynq devices.
 
+config SYS_FPGA_CHECK_CTRLC
+       bool "Allow Control-C to interrupt FPGA configuration"
+       depends on FPGA
+       help
+         User can interrupt FPGA configuration by pressing CTRL+C.
+
 endmenu
index b3e0537bab07d08363a023a486f60250b59340a4..0fd2290e3d35b71785485e88645b1bf3a0c9eea3 100644 (file)
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #endif
 
-/*
- * Don't allow config cycle to be interrupted
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
-#undef CONFIG_SYS_FPGA_CHECK_CTRLC
-#endif
-
 /*
  * Check for errors during configuration by default
  */