arm: dts: sunxi: update H3 to new EMAC binding

The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index 20d489cb2aa0fb6eb05c6b051c5cd71997bde39f..e0efcb3ba3edc5a4c630b386735fc5b06223185e 100644 (file)
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -100,14 +100,10 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };
 
 &mmc0 {

diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
index 97b993f636f9eb512cc5ba24773f845467af5f88..c8fd69f0a4b865921bb36a53eccbbe7549519149 100644 (file)
--- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -125,15 +125,10 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };
 
 &ir {

diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
index 511305909894489ad40677d5fff91246bb946c8e..78f6c24952dd128249fd3010d212222832bb060a 100644 (file)
--- a/arch/arm/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
@@ -48,12 +48,8 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };

diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts
index caa1a6959cf297c93fc6d304f25639bb951ef94a..d97fdacb35afacbfeaffc9c49530409dd4b2a96c 100644 (file)
--- a/arch/arm/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts
@@ -55,6 +55,7 @@
        aliases {
                serial0 = &uart0;
                /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+               ethernet0 = &emac;
                ethernet1 = &rtl8189;
        };
 
@@ -110,14 +111,10 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };
 
 &ir {

diff --git a/arch/arm/dts/sun8i-h3-orangepi-one.dts b/arch/arm/dts/sun8i-h3-orangepi-one.dts
index 8df5c74f04c49e06d8358a2350110809a868639d..adab1cbfc921e6a13cbe21dbcaf4d6423b8fd46e 100644 (file)
--- a/arch/arm/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-one.dts
@@ -53,6 +53,7 @@
        compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
@@ -95,14 +96,10 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };
 
 &mmc0 {

diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
index b8340f74e770fc4c3fb1c6eeeecebcd1ed713945..afba264ea53c1e14663d3ac9318b649a34555daa 100644 (file)
--- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
@@ -53,6 +53,7 @@
        compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
@@ -167,12 +168,8 @@
 };
 
 &emac {
-       phy = <&phy1>;
+       phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
-       allwinner,use-internal-phy;
        allwinner,leds-active-low;
        status = "okay";
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
 };

diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
index e7079b26bc8a62db598abb6cbcfe66897c9b1146..136e4414a4fdb4badba401d90bf0e1bece351ab3 100644 (file)
--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
@@ -82,7 +82,13 @@
        pinctrl-0 = <&emac_rgmii_pins>;
        phy-supply = <&reg_gmac_3v3>;
        phy-mode = "rgmii";
-       /delete-property/allwinner,use-internal-phy;
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
 };
 
 &mmc2 {

diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
index f97b040b35aae9f56a45637f80f57bc1c3f2f69c..51aaf49b6dc69fe60d67d580f19662eb66017ace 100644 (file)
--- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
@@ -69,8 +69,15 @@
        pinctrl-names = "default";
        pinctrl-0 = <&emac_rgmii_pins>;
        phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
        phy-mode = "rgmii";
-       /delete-property/allwinner,use-internal-phy;
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
 };
 
 &pio {

diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
index afa60793a2353d3018f7dbc001df06c2e95b9fa8..d9d31fa3f5073022a2a9b89c7729fb2bf6714fc8 100644 (file)
--- a/arch/arm/dts/sun8i-h3.dtsi
+++ b/arch/arm/dts/sun8i-h3.dtsi
@@ -144,9 +144,10 @@
                #size-cells = <1>;
                ranges;
 
-               syscon: syscon@01c00000 {
-                       compatible = "allwinner,sun8i-h3-syscon","syscon";
-                       reg = <0x01c00000 0x34>;
+               syscon: syscon@1c00000 {
+                       compatible = "allwinner,sun8i-h3-system-controller",
+                                    "syscon";
+                       reg = <0x01c00000 0x1000>;
                };
 
                dma: dma-controller@01c02000 {
@@ -339,15 +340,12 @@
                        interrupt-controller;
                        #interrupt-cells = <3>;
 
-                       emac_rgmii_pins: emac0@0 {
-                               allwinner,pins = "PD0", "PD1", "PD2", "PD3",
-                                               "PD4", "PD5", "PD7",
-                                               "PD8", "PD9", "PD10",
-                                               "PD12", "PD13", "PD15",
-                                               "PD16", "PD17";
-                               allwinner,function = "emac";
-                               allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       emac_rgmii_pins: emac0 {
+                               pins = "PD0", "PD1", "PD2", "PD3", "PD4",
+                                      "PD5", "PD7", "PD8", "PD9", "PD10",
+                                      "PD12", "PD13", "PD15", "PD16", "PD17";
+                               function = "emac";
+                               drive-strength = <40>;
                        };
 
                        mmc0_pins_a: mmc0@0 {
@@ -466,16 +464,51 @@
 
                emac: ethernet@1c30000 {
                        compatible = "allwinner,sun8i-h3-emac";
-                       reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
-                       reg-names = "emac", "syscon";
+                       syscon = <&syscon>;
+                       reg = <0x01c30000 0x10000>;
                        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-                       resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
-                       reset-names = "ahb", "ephy";
-                       clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
-                       clock-names = "ahb", "ephy";
+                       interrupt-names = "macirq";
+                       resets = <&ccu RST_BUS_EMAC>;
+                       reset-names = "stmmaceth";
+                       clocks = <&ccu CLK_BUS_EMAC>;
+                       clock-names = "stmmaceth";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
+
+                       mdio: mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "snps,dwmac-mdio";
+                       };
+
+                       mdio-mux {
+                               compatible = "allwinner,sun8i-h3-mdio-mux";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               mdio-parent-bus = <&mdio>;
+                               /* Only one MDIO is usable at the time */
+                               internal_mdio: mdio@1 {
+                                       compatible = "allwinner,sun8i-h3-mdio-internal";
+                                       reg = <1>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       int_mii_phy: ethernet-phy@1 {
+                                               compatible = "ethernet-phy-ieee802.3-c22";
+                                               reg = <1>;
+                                               clocks = <&ccu CLK_BUS_EPHY>;
+                                               resets = <&ccu RST_BUS_EPHY>;
+                                       };
+                               };
+
+                               external_mdio: mdio@2 {
+                                       reg = <2>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
+                       };
                };
 
                gic: interrupt-controller@01c81000 {