/* Network */
-/* USB Configs */
-/* Host */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Framebuffer and LCD */
/* Command definition */
/* DMA stuff, needed for GPMI/MXS NAND support */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* UBI support */
#define CFG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_BRPP2_IMX6_H */
#define CFG_SYS_FSL_USDHC_NUM 2
#endif
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_H */
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 0
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Boot */
#define CFG_SYS_BOOTMAPSZ (8 << 20)
#define CFG_SYS_NAND_BASE -1
#endif
-/* USB Configs */
-
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_SYS_FSL_ESDHC_ADDR 0
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-/* Host */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Command definition */
#define BOOT_TARGET_DEVICES(func) \
#define CFG_SYS_NAND_BASE 0x40000000
#endif
-/* USB Configs */
-
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
/* UART */
#define CFG_MXC_UART_BASE UART1_BASE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* USB Gadget (DFU, UMS) */
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* The 0x120000 value corresponds to above SPI-NOR memory MAP */
#endif
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
#define CONSOLE_DEVICE "ttymxc2" /* Base board debug connector */
#endif
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Memory */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
#define CFG_POWER_LTC3676_I2C_ADDR 0x3c
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
#define CFG_SYS_NAND_BASE 0x40000000
#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
/* Falcon Mode */
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 1
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Falcon */
/* MMC support: args@1MB kernel@2MB */
#endif
#endif
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __IMX6Q_ACC_H */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_H */
#define CFG_FEC_MXC_PHYADDR -1 /* Auto search of PHY on MII */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /*__IMX8MM_CL_IOT_GATE_H*/
/* Board and environment settings */
#define CFG_MXC_UART_BASE UART4_BASE
-#ifdef CONFIG_USB_EHCI_HCD
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
/* Boot order for distro boot */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
/* Board and environment settings */
-#ifdef CONFIG_USB_EHCI_HCD
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
/* GUID for capsule updatable firmware image */
#define KONTRON_SL_MX8MM_FIT_IMAGE_GUID \
EFI_GUID(0xd488e45a, 0x4929, 0x4b55, 0x8c, 0x14, \
#include <linux/sizes.h>
/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
/* FEC ethernet */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
"fdt_addr=0x18000000\0" \
/* FLASH and environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 0
* USB
*/
#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* Environment configs */
-/* USB configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif
/* bootz: zImage/initrd.img support */
/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* PMIC Controller */
#include <asm/arch/imx-regs.h>
/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Command definition */
#define CFG_MXC_UART_BASE UART1_BASE
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CFG_MXC_USB_PORTSC PORT_PTS_UTMI
#endif /* __CONFIG_H */
#define CFG_MXC_UART_BASE UART4_BASE
#define CONSOLE_DEV "ttymxc3"
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
#include "mx6sabre_common.h"
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#endif /* __MX6SABRESD_CONFIG_H */
/* Environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#define CFG_SYS_FSL_USDHC_NUM 3
#endif /* __CONFIG_H */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 3
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#include <linux/stringify.h>
#endif /* __CONFIG_H */
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 0x0
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#define CFG_SYS_FSL_USDHC_NUM 2
#endif /* __CONFIG_H */
#define CFG_FEC_MXC_PHYADDR 0x1
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
/* environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 1
/* DMA stuff, needed for GPMI/MXS NAND support */
#endif
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_H */
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE SZ_256K
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 6
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#ifdef CONFIG_CMD_MMC
#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
#else
/* UART */
#define CFG_MXC_UART_BASE UART2_BASE
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
/* Extra U-Boot environment. */
#define CFG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#if IS_ENABLED(CONFIG_CMD_USB)
-# define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif /* CONFIG_CMD_USB */
-
#define CFG_EXTRA_ENV_SETTINGS \
"mmcdev=0\0" \
"mmcpart=2\0" \
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB */
-#ifdef CONFIG_USB_EHCI_MX6
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
/* LCD */
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
/* MMC Configuration */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif
/* environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#endif
-/* USB */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif /* CONFIG_CMD_USB */
-
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#if defined(CONFIG_TQMA6X_MMC_BOOT)
#define TQMA6_UBOOT_OFFSET SZ_1K
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Linux boot */
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE (long)(SZ_1G)
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __VERDIN_IMX8MM_H */
/* Network */
#define CFG_FEC_MXC_PHYADDR 0x0
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6)
#define CFG_SYS_FSL_USDHC_NUM 2
#define CFG_SYS_FSL_ESDHC_ADDR 0
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0\0" \
"splashpos=m,m\0" \
#define CFG_SYS_FSL_USDHC_NUM 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* Environment is in stored in the eMMC boot partition */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#define CFG_FEC_ENET_DEV 0
#define CFG_FEC_MXC_PHYADDR 0x0