riscv: dts: sophgo: Add clk node and sdhci node

Add clk node and sdhci node for cv18xx SoCs according to patches from Linux
kernel.

clk: https://lore.kernel.org/all/IA1PR20MB4953F9AD6792013B54636F05BB4F2@IA1PR20MB4953.namprd20.prod.outlook.com/
sdhci: https://lore.kernel.org/all/20240217144826.3944-1-jszhang@kernel.org/

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts
index 3af9e34b3bc75d19760064ffc82179cfc715bd71..94e64ddce8fa3f878d72750adc011c1c9e0f81d4 100644 (file)
--- a/arch/riscv/dts/cv1800b-milkv-duo.dts
+++ b/arch/riscv/dts/cv1800b-milkv-duo.dts
@@ -33,6 +33,14 @@
        clock-frequency = <25000000>;
 };
 
+&sdhci0 {
+       status = "okay";
+       bus-width = <4>;
+       no-1-8-v;
+       no-mmc;
+       no-sdio;
+};
+
 &uart0 {
        status = "okay";
 };

diff --git a/arch/riscv/dts/cv1800b.dtsi b/arch/riscv/dts/cv1800b.dtsi
index 165e9e320a8c72d7f56ecb61fd86e7d58c8c4333..baf641829e726886a94e9fe1f8b26465096d201d 100644 (file)
--- a/arch/riscv/dts/cv1800b.dtsi
+++ b/arch/riscv/dts/cv1800b.dtsi
@@ -16,3 +16,7 @@
 &clint {
        compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
 };
+
+&clk {
+       compatible = "sophgo,cv1800-clk";
+};

diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi
index 2d6f4a4b1e58b4b56ac49c051af7fbc5bf9c4d12..ec99c4deeb69e5061da01d74fc9e7cdc15376c43 100644 (file)
--- a/arch/riscv/dts/cv18xx.dtsi
+++ b/arch/riscv/dts/cv18xx.dtsi
@@ -45,6 +45,13 @@
                #clock-cells = <0>;
        };
 
+       sdhci_clk: sdhci-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <375000000>;
+               clock-output-names = "sdhci_clk";
+               #clock-cells = <0>;
+       };
+
        soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;
@@ -53,6 +60,12 @@
                dma-noncoherent;
                ranges;
 
+               clk: clock-controller@3002000 {
+                       reg = <0x03002000 0x1000>;
+                       clocks = <&osc>;
+                       #clock-cells = <1>;
+               };
+
                gpio0: gpio@3020000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0x3020000 0x1000>;
@@ -175,6 +188,15 @@
                        status = "disabled";
                };
 
+               sdhci0: mmc@4310000 {
+                       compatible = "sophgo,cv1800b-dwcmshc";
+                       reg = <0x4310000 0x1000>;
+                       interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&sdhci_clk>;
+                       clock-names = "core";
+                       status = "disabled";
+               };
+
                plic: interrupt-controller@70000000 {
                        reg = <0x70000000 0x4000000>;
                        interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;