mmc: tmio: sdhi: Merge DTCNTL access into single register write

It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 63561e19c82bcfbd1b479db0ee75681c98230d27..e7f96f8bf224a8b61d79b30bfeafd9e693433697 100644 (file)
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -51,12 +51,9 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv)
        tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
 
        /* Set sampling clock selection range */
-       tmio_sd_writel(priv, 0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT,
-                          RENESAS_SDHI_SCC_DTCNTL);
-
-       reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL);
-       reg |= RENESAS_SDHI_SCC_DTCNTL_TAPEN;
-       tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_DTCNTL);
+       tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
+                            RENESAS_SDHI_SCC_DTCNTL_TAPEN,
+                            RENESAS_SDHI_SCC_DTCNTL);
 
        reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL);
        reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL;