ARM: stm32: Switch DHSOM to FMC2 EBI driver

Perform long overdue conversion of ad-hoc FMC2 EBI bus initialization
to upstream FMC2 EBI driver. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
index 5bc6698f87fc4267678ecc1a2160d74dd68573c7..0bcaec50198c8ab3b10e433cbb6039ae8437cc51 100644 (file)
--- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
@@ -5,14 +5,6 @@
 
 #include "stm32mp15xx-dhcom-u-boot.dtsi"
 
-/ {
-       aliases {
-               /delete-property/ ethernet1;
-       };
-};
-
-/delete-node/ &ks8851;
-
 &usbotg_hs {
        dr_mode = "peripheral";
 };

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index ee747a52bb7ca8833c01772dcfeb2ef0eedbe412..8a7156c93bfec9b53e39c9ab6d60e2ad254bee96 100644 (file)
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -9,8 +9,6 @@
 #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
 #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
 
-/delete-node/ &ksz8851;
-
 / {
        aliases {
                i2c1 = &i2c2;
@@ -21,7 +19,6 @@
                spi0 = &qspi;
                usb0 = &usbotg_hs;
                eeprom0 = &eeprom0;
-               ethernet1 = &ks8851;
        };
 
        config {
@@ -30,12 +27,6 @@
                dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
                dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
        };
-
-       /* This is actually on FMC2, but we do not have bus driver for that */
-       ks8851: ks8851mll@64000000 {
-               compatible = "micrel,ks8851-mll";
-               reg = <0x64000000 0x20000>;
-       };
 };
 
 &ethernet0 {
@@ -74,11 +65,6 @@
 };
 
 &pinctrl {
-       /* These should bound to FMC2 bus driver, but we do not have one */
-       pinctrl-0 = <&fmc_pins_b &mco2_pins_a>;
-       pinctrl-1 = <&fmc_sleep_pins_b &mco2_sleep_pins_a>;
-       pinctrl-names = "default", "sleep";
-
        mco2_pins_a: mco2-0 {
                pins {
                        pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi
index 407fed56167e504d46160ade7ab1954988e21908..b6a6a78647a1cf9b65256b0c69a473171e534eb4 100644 (file)
--- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi
@@ -5,25 +5,16 @@
 
 #include "stm32mp15xx-dhcor-u-boot.dtsi"
 
-/delete-node/ &ksz8851;
-
 / {
        aliases {
                mmc0 = &sdmmc1;
                mmc1 = &sdmmc2;
                usb0 = &usbotg_hs;
-               ethernet1 = &ks8851;
        };
 
        config {
                dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>;
        };
-
-       /* This is actually on FMC2, but we do not have bus driver for that */
-       ks8851: ks8851mll@64000000 {
-               compatible = "micrel,ks8851-mll";
-               reg = <0x64000000 0x20000>;
-       };
 };
 
 &ethernet0 {
@@ -38,13 +29,6 @@
        };
 };
 
-&pinctrl {
-       /* These should bound to FMC2 bus driver, but we do not have one */
-       pinctrl-0 = <&fmc_pins_b>;
-       pinctrl-1 = <&fmc_sleep_pins_b>;
-       pinctrl-names = "default", "sleep";
-};
-
 &sdmmc1 {
        u-boot,dm-spl;
        st,use-ckin;

diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index e3c7ed104924c1394e4f9c51279b8df23603575c..9188f5381eb819f076d65f99850a4f2485cebe6f 100644 (file)
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -527,56 +527,6 @@ static void sysconf_init(void)
 #endif
 }
 
-static void board_init_fmc2(void)
-{
-#define STM32_FMC2_BCR1                        0x0
-#define STM32_FMC2_BTR1                        0x4
-#define STM32_FMC2_BWTR1               0x104
-#define STM32_FMC2_BCR(x)              ((x) * 0x8 + STM32_FMC2_BCR1)
-#define STM32_FMC2_BCRx_FMCEN          BIT(31)
-#define STM32_FMC2_BCRx_WREN           BIT(12)
-#define STM32_FMC2_BCRx_RSVD           BIT(7)
-#define STM32_FMC2_BCRx_FACCEN         BIT(6)
-#define STM32_FMC2_BCRx_MWID(n)                ((n) << 4)
-#define STM32_FMC2_BCRx_MTYP(n)                ((n) << 2)
-#define STM32_FMC2_BCRx_MUXEN          BIT(1)
-#define STM32_FMC2_BCRx_MBKEN          BIT(0)
-#define STM32_FMC2_BTR(x)              ((x) * 0x8 + STM32_FMC2_BTR1)
-#define STM32_FMC2_BTRx_DATAHLD(n)     ((n) << 30)
-#define STM32_FMC2_BTRx_BUSTURN(n)     ((n) << 16)
-#define STM32_FMC2_BTRx_DATAST(n)      ((n) << 8)
-#define STM32_FMC2_BTRx_ADDHLD(n)      ((n) << 4)
-#define STM32_FMC2_BTRx_ADDSET(n)      ((n) << 0)
-
-#define RCC_MP_AHB6RSTCLRR             0x218
-#define RCC_MP_AHB6RSTCLRR_FMCRST      BIT(12)
-#define RCC_MP_AHB6ENSETR              0x19c
-#define RCC_MP_AHB6ENSETR_FMCEN                BIT(12)
-
-       const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD |
-                       STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) |
-                       STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN |
-                       STM32_FMC2_BCRx_MBKEN;
-       const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) |
-                       STM32_FMC2_BTRx_BUSTURN(2) |
-                       STM32_FMC2_BTRx_DATAST(0x22) |
-                       STM32_FMC2_BTRx_ADDHLD(2) |
-                       STM32_FMC2_BTRx_ADDSET(2);
-
-       /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
-       writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
-       writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
-
-       /* KS8851-16MLL -- Muxed mode */
-       writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
-       writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
-       /* AS7C34098 SRAM on X11 -- Muxed mode */
-       writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
-       writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
-
-       setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
-}
-
 #ifdef CONFIG_DM_REGULATOR
 #define STPMIC_NVM_BUCKS_VOUT_SHR                      0xfc
 #define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2             0
@@ -671,8 +621,6 @@ int board_init(void)
 
        sysconf_init();
 
-       board_init_fmc2();
-
        return 0;
 }
 

diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index e1a557ec00388110c2ca17d968d676d0dd10ba90..f47e70be44ad470a2c69474bfdfeb403abcd1f9c 100644 (file)
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -108,6 +108,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_STM32F7=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_STM32_FMC2_EBI=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SUPPORT_EMMC_BOOT=y

diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 81eabeb358c2303303120ed9642539a1505a7cbf..02cce50691e03ba2cd02c6188924f8384cfd1123 100644 (file)
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -105,6 +105,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_STM32F7=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_STM32_FMC2_EBI=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x53
 CONFIG_SUPPORT_EMMC_BOOT=y