]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
clk: rk3399: Enable/Disable the PCIEPHY clk
authorJagan Teki <jagan@amarulasolutions.com>
Sat, 9 May 2020 16:56:20 +0000 (22:26 +0530)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 22 May 2020 12:53:20 +0000 (20:53 +0800)
Enable/Disable the PCIEPHY clk for rk3399.

CLK is clear in both enable and disable functionality.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3399.c

index 371410d9a91b76b035577f407c43ec73323a14d4..6a78837619eff53190a158ae87f0c6bce51a4bef 100644 (file)
@@ -1139,6 +1139,9 @@ static int rk3399_clk_enable(struct clk *clk)
        case HCLK_HOST1_ARB:
                rk_clrreg(&priv->cru->clksel_con[20], BIT(8));
                break;
+       case SCLK_PCIEPHY_REF:
+               rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+               break;
        default:
                debug("%s: unsupported clk %ld\n", __func__, clk->id);
                return -ENOENT;
@@ -1212,6 +1215,9 @@ static int rk3399_clk_disable(struct clk *clk)
        case HCLK_HOST1_ARB:
                rk_setreg(&priv->cru->clksel_con[20], BIT(8));
                break;
+       case SCLK_PCIEPHY_REF:
+               rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+               break;
        default:
                debug("%s: unsupported clk %ld\n", __func__, clk->id);
                return -ENOENT;