]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: k3-*-r5: Add MPU clock in clocks property
authorManorit Chawdhry <m-chawdhry@ti.com>
Tue, 15 Oct 2024 10:52:19 +0000 (16:22 +0530)
committerTom Rini <trini@konsulko.com>
Mon, 21 Oct 2024 23:52:31 +0000 (17:52 -0600)
MPU clock had been missing. Distinguish multiple clocks with clock-names
and add MPU clock as well.

Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html#clocks-for-a72ss0-core0-device
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
14 files changed:
arch/arm/dts/k3-am62-r5-lp-sk.dts
arch/arm/dts/k3-am625-r5-beagleplay.dts
arch/arm/dts/k3-am625-r5-sk.dts
arch/arm/dts/k3-am62a7-r5-sk.dts
arch/arm/dts/k3-am62p5-r5-sk.dts
arch/arm/dts/k3-am642-r5-evm.dts
arch/arm/dts/k3-am642-r5-sk.dts
arch/arm/dts/k3-am654-r5-base-board.dts
arch/arm/dts/k3-am69-r5-sk.dts
arch/arm/dts/k3-j7200-r5-common-proc-board.dts
arch/arm/dts/k3-j721e-r5.dtsi
arch/arm/dts/k3-j721s2-r5.dtsi
arch/arm/dts/k3-j722s-r5-evm.dts
arch/arm/dts/k3-j784s4-r5-evm.dts

index ec5d3f4ba2cba7fe6524aec4b596862867bbe77c..b8e5f49a1fc7491208b3690ff2584dd6fb8eb42c 100644 (file)
@@ -25,7 +25,8 @@
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1200000000>;
index f0b66f0cb945a6920d470f66f9b5a5ecc1ab10ee..9e0a6ed678448534aaa9c985b9369aa78c7815e9 100644 (file)
@@ -24,7 +24,8 @@
                power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1250000000>;
index 0912b953db073d496b64a3d75ad3ffc5045be535..d2dd75469c1a60993556d5c999c279a7d5b91532 100644 (file)
@@ -25,7 +25,8 @@
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1200000000>;
index bc05dcb5efbe1844d52ebd05e2cce8cf3f69c624..464227b3b25de125462199ce5a7dc6511f16fe24 100644 (file)
@@ -23,7 +23,8 @@
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1200000000>;
index 658f2cf730a70c20b5e513b2cee36f7169588b42..baf1a83dc12459699da58c03da30eef540db3180 100644 (file)
@@ -26,7 +26,8 @@
                        <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                        <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1200000000>;
index be8596987babb4e3cd62542a553d6538301b41a8..933f75095b1175d38e5660b37edcf801a19e663e 100644 (file)
@@ -22,7 +22,8 @@
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1000000000>;
index 2186152a0b8ea8a5e0a906c78b238db1b6114e0e..6e31dfd97c5e8bb2f665522189de8d22f40f4761 100644 (file)
@@ -22,7 +22,8 @@
                                <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1000000000>;
index dea2ba85dcb3126ce12236049fc208df636f5ccf..ab5195eb15c58fe060c5593101dc836923a14172 100644 (file)
@@ -22,7 +22,8 @@
                power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 202 0>;
                assigned-clock-rates = <800000000>;
                ti,sci = <&dmsc>;
index 4d6aab5ccc38718ab6711791339944ebf3d4aded..13809f82d99a6fc7da1fc2401b33bf0d0bb75548 100644 (file)
@@ -26,7 +26,8 @@
                power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <2000000000>;
index 94760c78dd35508fb017d160e6d516635bc3bcad..f8df14935dbc0f3d929bbf1394341a12bd60937d 100644 (file)
@@ -23,7 +23,8 @@
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 1>;
+               clocks = <&k3_clks 61 1>, <&k3_clks 202 2>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>;
                assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>;
                assigned-clock-rates = <2000000000>, <200000000>;
index fd0d921272c5baad1c6e93e389cac7ca124e664e..688a6cf40892b03b0f1b7af59fdff1ed409011af 100644 (file)
@@ -20,7 +20,8 @@
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 1>;
+               clocks = <&k3_clks 61 1>, <&k3_clks 202 2>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
                assigned-clock-rates = <2000000000>, <200000000>;
                ti,sci = <&dmsc>;
index caf696c2d960c53f674b291378c12d6458e625a6..634676c8491ee6e67668e1e9b3b6c1c3ead31578 100644 (file)
@@ -20,7 +20,8 @@
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 1>;
+               clocks = <&k3_clks 61 1>, <&k3_clks 202 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>;
                assigned-clock-parents = <&k3_clks 61 3>;
                assigned-clock-rates = <200000000>, <2000000000>;
index aff83cd5d91469c94c72ff237dd0abbfb6c05159..69785ec78e942d8a78a65c240f6a4160bb8a9b63 100644 (file)
@@ -25,7 +25,8 @@
                        <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
                        <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 135 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <1200000000>;
index d2c7522936306ca0d48f0e72f480fb6deaa04fea..8b8b0e70047e6c7538eee6e39f4fca182796f751 100644 (file)
@@ -26,7 +26,8 @@
                power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
                                <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
-               clocks = <&k3_clks 61 0>;
+               clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+               clock-names = "gtc", "core";
                assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
                assigned-clock-parents = <&k3_clks 61 2>;
                assigned-clock-rates = <200000000>, <2000000000>;