mmc: zynq_sdhci: Fix timing macros for MMC High speed

Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index e978b6798854f997e009aca984003f99e0fe145b..8f4071c8c2873fd1330fd580ecc07a1d02922418 100644 (file)
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -101,8 +101,8 @@ static const u8 mode2timing[] = {
        [MMC_LEGACY] = MMC_TIMING_LEGACY,
        [MMC_HS] = MMC_TIMING_MMC_HS,
        [SD_HS] = MMC_TIMING_SD_HS,
-       [MMC_HS_52] = MMC_TIMING_UHS_SDR50,
-       [MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
+       [MMC_HS_52] = MMC_TIMING_MMC_HS,
+       [MMC_DDR_52] = MMC_TIMING_MMC_DDR52,
        [UHS_SDR12] = MMC_TIMING_UHS_SDR12,
        [UHS_SDR25] = MMC_TIMING_UHS_SDR25,
        [UHS_SDR50] = MMC_TIMING_UHS_SDR50,