ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoC

For Electro-Magnetic Compatibility test.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/clk/pll-ld11.c b/arch/arm/mach-uniphier/clk/pll-ld11.c
index 8a4a748cfdb240c3f04ccb975a578380c9c7aa92..7746deb72d1d1067ac1ca28d0313d2473e54ec34 100644 (file)
--- a/arch/arm/mach-uniphier/clk/pll-ld11.c
+++ b/arch/arm/mach-uniphier/clk/pll-ld11.c
@@ -23,6 +23,7 @@ void uniphier_ld11_pll_init(void)
        uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL);
        uniphier_ld20_sscpll_ssc_en(SC_MPLLCTRL);
        uniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL);
+       uniphier_ld20_sscpll_ssc_en(SC_DPLLCTRL);
 
        uniphier_ld20_vpll27_init(SC_VPLL27FCTRL);
        uniphier_ld20_vpll27_init(SC_VPLL27ACTRL);