pinctrl: renesas: Synchronize R8A77965 M3-N PFC tables with Linux 6.5.3

Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 04e8371f51ef44b4a015a8660e6b7aa796962a43..377143d391834a67ab1989a93221f109e13fc452 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -26,12 +26,12 @@
        PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS),  \
        PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS),  \
        PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS),  \
-       PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),      \
+       PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),        \
        PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS),       \
        PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS),       \
        PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS),       \
        PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS),       \
-       PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),      \
+       PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),        \
        PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS),  \
        PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS),  \
        PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS)
@@ -5809,7 +5809,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                /* RESERVED 16-1 */
                MOD_SEL2_0 ))
        },
-       { },
+       { /* sentinel */ }
 };
 
 static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -6057,7 +6057,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
                { RCAR_GP_PIN(6, 30),  8, 3 },  /* GP6_30 */
                { RCAR_GP_PIN(6, 31),  4, 3 },  /* GP6_31 */
        } },
-       { },
+       { /* sentinel */ }
 };
 
 enum ioctrl_regs {
@@ -6068,7 +6068,7 @@ enum ioctrl_regs {
 static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
        [POCCTRL] = { 0xe6060380, },
        [TDSELCTRL] = { 0xe60603c0, },
-       { /* sentinel */ },
+       { /* sentinel */ }
 };
 
 static int r8a77965_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -6325,7 +6325,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
                [30] = SH_PFC_PIN_NONE,
                [31] = SH_PFC_PIN_NONE,
        } },
-       { /* sentinel */ },
+       { /* sentinel */ }
 };
 
 static const struct sh_pfc_soc_operations r8a77965_pfc_ops = {