]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: remove CONFIG_MACPWR
authorAndre Przywara <andre.przywara@arm.com>
Wed, 8 Jun 2022 13:56:56 +0000 (14:56 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Sun, 22 Oct 2023 22:40:56 +0000 (23:40 +0100)
The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables
the power for the Ethernet "MAC" (mostly PHY, really).
In the DT this is described with the phy-supply property in the MAC DT
node, pointing to a (GPIO controlled) regulator. Since we need Ethernet
only in U-Boot proper, and use a DM driver there, we should use the DT
instead of hardcoding this.

Add code to the sun8i_emac and sunxi_emac drivers to check the DT for
that regulator and enable it, at probe time. Then drop the current code
from board.c, which was doing that job before.
This allows us to remove the MACPWR Kconfig definition and the respective
values from the defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
26 files changed:
arch/arm/mach-sunxi/Kconfig
board/sunxi/board.c
configs/Bananapi_M2_Ultra_defconfig
configs/Bananapi_defconfig
configs/Bananapro_defconfig
configs/Lamobo_R1_defconfig
configs/Mele_A1000_defconfig
configs/Orangepi_defconfig
configs/Orangepi_mini_defconfig
configs/bananapi_m1_plus_defconfig
configs/bananapi_m2_plus_h3_defconfig
configs/bananapi_m2_plus_h5_defconfig
configs/i12-tvbox_defconfig
configs/jesurun_q5_defconfig
configs/mixtile_loftq_defconfig
configs/nanopi_m1_plus_defconfig
configs/nanopi_neo_plus2_defconfig
configs/nanopi_r1s_h5_defconfig
configs/orangepi_pc2_defconfig
configs/orangepi_plus2e_defconfig
configs/orangepi_plus_defconfig
configs/orangepi_win_defconfig
configs/pine_h64_defconfig
configs/zeropi_defconfig
drivers/net/sun8i_emac.c
drivers/net/sunxi_emac.c

index 1b24dfe4dd1c54f85eb32accb717ddc6eba45f30..d3ed62add99ca51b7cd2b34cf96836225abd9cc5 100644 (file)
@@ -695,13 +695,6 @@ config OLD_SUNXI_KERNEL_COMPAT
        Set this to enable various workarounds for old kernels, this results in
        sub-optimal settings for newer kernels, only enable if needed.
 
-config MACPWR
-       string "MAC power pin"
-       default ""
-       help
-         Set the pin used to power the MAC. This takes a string in the format
-         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
-
 config MMC1_PINS_PH
        bool "Pins for mmc1 are on Port H"
        depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
index 50a60e760d4121feaa2f4c943a6d38e672cab2eb..5cfb33468e5d441e6bca54876c0223fd2209eb72 100644 (file)
@@ -187,7 +187,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 /* add board specific code here */
 int board_init(void)
 {
-       __maybe_unused int id_pfr1, ret, macpwr_pin;
+       __maybe_unused int id_pfr1, ret;
 
        gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
 
@@ -224,15 +224,6 @@ int board_init(void)
        if (ret)
                return ret;
 
-       /* strcmp() would look better, but doesn't get optimised away. */
-       if (CONFIG_MACPWR[0]) {
-               macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
-               if (macpwr_pin >= 0) {
-                       gpio_request(macpwr_pin, "macpwr");
-                       gpio_direction_output(macpwr_pin, 1);
-               }
-       }
-
 #if CONFIG_IS_ENABLED(DM_I2C)
        /*
         * Temporary workaround for enabling I2C clocks until proper sunxi DM
@@ -240,7 +231,6 @@ int board_init(void)
         */
        i2c_init_board();
 #endif
-
        eth_init_board();
 
        return 0;
index a5fe76af56843fa81117b82455bdebf2f7638438..2cc7bbbd8b7c2716211dd90791e6682172af87cb 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_R40=y
 CONFIG_DRAM_CLK=576
-CONFIG_MACPWR="PA17"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB1_VBUS_PIN="PH23"
 CONFIG_USB2_VBUS_PIN="PH23"
index 6c2a1f630e848c209ea16a4c6ac52e62ccfeccac..f4910ba13acadae9cfccad579c45a5e8e6f5062d 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_VIDEO_COMPOSITE=y
 CONFIG_GMAC_TX_DELAY=3
 CONFIG_AHCI=y
index 94fd74754ea323e361455a30d852c5b1cb5be99a..02be8971df92b26a4ed99e5061e003c91534a18a 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_USB1_VBUS_PIN="PH0"
 CONFIG_USB2_VBUS_PIN="PH1"
 CONFIG_VIDEO_COMPOSITE=y
index 9639cb6aad9784320fc04ad05771d472bb6a1b15..66f57ab3c859c0c86413cd41d2d8df9b6f41ed3b 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index f5b6d908cdc06c112538c490f39a77ad20c14372..9ac2e4839d91bf8d81b5dfb8232be49b916b410c 100644 (file)
@@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y
 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
 CONFIG_SPL=y
 CONFIG_MACH_SUN4I=y
-CONFIG_MACPWR="PH15"
 CONFIG_VIDEO_VGA=y
 CONFIG_VIDEO_COMPOSITE=y
 CONFIG_AHCI=y
index c89a9a1f9dd531c6c25f8e48b916fe5ba28219ae..53edf525ec0051a8b95baf5b472162fefb7d772f 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_USB1_VBUS_PIN="PH26"
 CONFIG_USB2_VBUS_PIN="PH22"
 CONFIG_VIDEO_VGA=y
index fe9ce808a1ef3efffc20b4b8911bf7138700a3a0..ccf32670170d3f9a66b9d2994f6d15c178ee5f93 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=3
 CONFIG_USB1_VBUS_PIN="PH26"
 CONFIG_USB2_VBUS_PIN="PH22"
index 0fbb619d62314070d1a921f75a32f5bfb17ac044..a432a01f6b4a6ffb57c68f791f9304d384f57472 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
-CONFIG_MACPWR="PH23"
 CONFIG_VIDEO_COMPOSITE=y
 CONFIG_GMAC_TX_DELAY=3
 CONFIG_AHCI=y
index 26ced59fb02b49a2439c7bd0ed3ee8e2f0f8a10e..a8f9b5044b0a38e8278392d71be9e23435d09e41 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=672
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SUN8I_EMAC=y
index fb6c945919a059f62068513cbad864d4a5d03c3e..1634f6261908459f356bd0b5f435d2c7b81a4607 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus"
 CONFIG_SPL=y
 CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SUN8I_EMAC=y
index 257dd89af45b45b53205e94eb6a10d813338f8f3..37f0f53ae7def533ddf8e5393e667b4da877e647 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=384
-CONFIG_MACPWR="PH21"
 CONFIG_VIDEO_COMPOSITE=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 0ff666b2ee5c0e5b3e54d0d7ebd08297073414ee..c99be7cea4e838da909c8ed4b8cfdb972cf1f1fc 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
 CONFIG_SPL=y
 CONFIG_MACH_SUN4I=y
 CONFIG_DRAM_CLK=312
-CONFIG_MACPWR="PH19"
 CONFIG_USB0_VBUS_PIN="PB9"
 CONFIG_VIDEO_COMPOSITE=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 0e4cdc4467015e56215e29e184be9935e3fda953..2f92228eb7b03262bbc239b42ad5917855327cf3 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
 CONFIG_SPL=y
 CONFIG_MACH_SUN6I=y
 CONFIG_DRAM_ZQ=251
-CONFIG_MACPWR="PA21"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB1_VBUS_PIN="PH24"
 CONFIG_USB2_VBUS_PIN=""
index 76655d79ae026216e8e176f951759ea59e051a5d..078e98b644d5154ddf893f28301afa8590d04869 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=408
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SUN8I_EMAC=y
index 924ff38f17cacf9be50b9a0520633df489251df6..85ff31c6fe5c8fc839ca5c4eccd4d0b32a3570cd 100644 (file)
@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=408
 CONFIG_DRAM_ZQ=3881977
 # CONFIG_DRAM_ODT_EN is not set
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SUN8I_EMAC=y
index 27cf172d72af1180fb4cef03529fa7c09cc4339b..2a6f94afe4081090e1e0a596b88c895e53f8aac0 100644 (file)
@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
 CONFIG_DRAM_ZQ=3881977
 # CONFIG_DRAM_ODT_EN is not set
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SUN8I_EMAC=y
index 777af8c60ea7035d3cc09c071ff5a0a482b6c9e7..fb6fbaf787a671568c26d97f8e7f9805b963dd4d 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
 CONFIG_DRAM_ZQ=3881977
-CONFIG_MACPWR="PD6"
 CONFIG_SPL_SPI_SUNXI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 138a6a72b8ce0d9c871dafe1f865791554ab60ba..5e2cbc48ea20b764a3fdbbbfc9f7dfb29a5aa5c6 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=672
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index ed585881d49b16b69d822421788c573c3581809c..092ce77a6c4f4b30e39742f6a472a32e586e1099 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=672
-CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB1_VBUS_PIN="PG13"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index df11ad8c8fd8a527b661216a305b6e43830bd896..3ddaf050a481f17bc437dbe0dbae66879a20f023 100644 (file)
@@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
 CONFIG_SPL=y
 CONFIG_MACH_SUN50I=y
-CONFIG_MACPWR="PD14"
 CONFIG_SPL_SPI_SUNXI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPI_FLASH_WINBOND=y
index 6dac6098d04e6e813427ce0def02eff30ca9bcd4..4712b8e46946f3b45b4f885fadbea4ae2184ae7a 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
 CONFIG_SPL=y
 CONFIG_MACH_SUN50I_H6=y
 CONFIG_SUNXI_DRAM_H6_LPDDR3=y
-CONFIG_MACPWR="PC16"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB3_VBUS_PIN="PL5"
 CONFIG_SPL_SPI_SUNXI=y
index 11f3715e6dccd7eb4eafe41acd3a04947f71c387..7901bffd159004a9a01a73a46d3559fb1017d762 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-zeropi"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=408
-CONFIG_MACPWR="PD6"
 # CONFIG_VIDEO_DE2 is not set
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_CONSOLE_MUX=y
index 04c3274fbe155eeda9c45c74ce84eea4fa047a4d..4ba9ee1529ec1ee9914597719668b938ec8d633d 100644 (file)
@@ -29,6 +29,7 @@
 #include <net.h>
 #include <reset.h>
 #include <wait_bit.h>
+#include <power/regulator.h>
 
 #define MDIO_CMD_MII_BUSY              BIT(0)
 #define MDIO_CMD_MII_WRITE             BIT(1)
@@ -170,6 +171,7 @@ struct emac_eth_dev {
 #if CONFIG_IS_ENABLED(DM_GPIO)
        struct gpio_desc reset_gpio;
 #endif
+       struct udevice *phy_reg;
 };
 
 
@@ -720,6 +722,9 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
 
        sun8i_emac_set_syscon(sun8i_pdata, priv);
 
+       if (priv->phy_reg)
+               regulator_set_enable(priv->phy_reg, true);
+
        sun8i_mdio_init(dev->name, dev);
        priv->bus = miiphy_get_dev_by_name(dev->name);
 
@@ -829,6 +834,8 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
 
        priv->sysctl_reg = (void *)syscon_base + priv->variant->syscon_offset;
 
+       device_get_supply_regulator(dev, "phy-supply", &priv->phy_reg);
+
        pdata->phy_interface = -1;
        priv->phyaddr = -1;
        priv->use_internal_phy = false;
index b599b84852fbbe3e59f769012f9136e57642fab4..f546ad1fe8dd7197e2a70a486d8157cb4457c74d 100644 (file)
@@ -598,9 +598,9 @@ static int sunxi_emac_eth_of_to_plat(struct udevice *dev)
        pdata->iobase = dev_read_addr(dev);
 
        phy_node = dev_get_phy_node(dev);
-       if (phy_node == ofnode_null()) {
+       if (!ofnode_valid(phy_node)) {
                dev_err(dev, "failed to get PHY node\n");
-               return ret;
+               return -ENOENT;
        }
        /*
         * The PHY regulator is in the MDIO node, not the EMAC or PHY node.