#include <asm/arch/cpu.h>
#ifdef CONFIG_I2C0_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE
+#define CFG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE
#endif
#ifdef CONFIG_I2C1_ENABLE
#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE
#include <asm/arch/soc.h>
-#define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 KW_TWSI_BASE
#define MV_UART_CONSOLE_BASE KW_UART0_BASE
#define MV_SATA_BASE KW_SATA_BASE
#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
{
switch (adap->hwadapnr) {
-#ifdef CONFIG_I2C_MVTWSI_BASE0
+#ifdef CFG_I2C_MVTWSI_BASE0
case 0:
- return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
+ return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE0;
#endif
#ifdef CONFIG_I2C_MVTWSI_BASE1
case 1:
10000);
}
-#ifdef CONFIG_I2C_MVTWSI_BASE0
+#ifdef CFG_I2C_MVTWSI_BASE0
U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
twsi_i2c_read, twsi_i2c_write,
twsi_i2c_set_bus_speed,
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* USB/EHCI configuration */
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* Environment in SPI NOR flash */
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* USB/EHCI configuration */
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/*
* mv-common.h should be defined after CMD configs since it used them
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* SPI NOR flash default params, used by sf commands */
*/
/* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
/* USB/EHCI configuration */