]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: k3: Remove unneeded ti, sci-sysreset binding and nodes
authorAndrew Davis <afd@ti.com>
Tue, 2 Apr 2024 16:09:08 +0000 (11:09 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 12 Apr 2024 02:44:36 +0000 (20:44 -0600)
This extra binding is non-standard and now unneeded as we bind the
sysreset driver automatically. This matches what is done in Linux
and allows us to more closely match the DTBs. Remove the binding
and all users.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
18 files changed:
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
arch/arm/dts/k3-am642-evm-u-boot.dtsi
arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
arch/arm/dts/k3-am642-sk-u-boot.dtsi
arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
arch/arm/dts/k3-am69-sk-u-boot.dtsi
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j721e-sk-u-boot.dtsi
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt [deleted file]

index cca0f44b7d8dfe76cb8111eee0a6efae2f2db1e7..fb2032068d1c6cd761e82a3a3a51c4963df16acf 100644 (file)
        clock-frequency = <25000000>;
 };
 
-&dmsc {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
-};
-
 &sd_pins_default {
        /* Force to use SDCD card detect pin */
        pinctrl-single,pins = <
index f6138f3058f33955dea3048c4d4deecd65730b47..94162282068cf59ff1ef2b864b611eeca75b54c9 100644 (file)
        bootph-all;
 };
 
-&dmsc {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
-};
-
 &fss {
        bootph-all;
 };
index 28b697b67ae08ec38fd0a5cdfc80d4f5713c8597..7fe7ae41543dc6cb7369c55f7827e97106a9e75f 100644 (file)
        bootph-all;
 };
 
-&dmsc {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
-};
-
 &fss {
        bootph-all;
 };
index 31b89b417483f48126ba885fc7408678d0f94dbf..c42dec161940c2ec34b537f7f594f5fd3a110f93 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &vdd_mmc1 {
index c166d6553906c48f7ece758e96e5445e76a05637..cf087c6e343a8af6f4bb2093bb6c3f28395a2686 100644 (file)
@@ -15,9 +15,4 @@
 
 &dmsc {
        bootph-pre-ram;
-
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-pre-ram;
-       };
 };
index ee6656774d6bfaa2a8417e1b21963df029a13866..705b3baa81cfbdc7eb532a59fb8ff5aad9e3990f 100644 (file)
        bootph-all;
 };
 
-&dmsc {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
-};
-
 &sdhci0 {
        bootph-all;
 };
index 5dfc40a843bf0643d3c24dad5d9190264647d617..4677c35e2d97214e1b574ff8a71b672b91e0efa9 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &dmss {
index 7e6b2981346637e0d3d32794395c53ad17de6125..6fcb11bd04d5b78c1edc64b8c78224bab97e2b81 100644 (file)
        clock-frequency = <200000000>;
 };
 
-&dmsc {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
-};
-
 &sdhci0 {
        status = "disabled";
 };
index d53f133cd633356c763752c5e071651c34581cd8..b6d2c816acc2d7fed9993a82c628975ce5d257c2 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &k3_pds {
index 4f34347586e0aeb4490752859066fae730779546..b8fc62f0dd1c32f5b6542b9c40eb9e859bdfc976 100644 (file)
 
 &sms {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &main_pmx0 {
index bed330e6d4e01b36807ee0e764eb330363a03dbf..4a82d2fd222669c4b390d4d877bc15329eab8894 100644 (file)
        bootph-pre-ram;
 };
 
-&sms {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-pre-ram;
-       };
-};
-
 #ifdef CONFIG_TARGET_J784S4_A72_EVM
 
 #define SPL_AM69_SK_DTB "spl/dts/ti/k3-am69-sk.dtb"
index c9fee0ea99bc4eb55a5713f5f204d05b7db7bd33..485f17c5f06451e88b4c63c6a9bafb7a55a17ce6 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &k3_pds {
index 116ee373118c848a3193911ddf588830cf4bc58d..e202ae16644c6e01cfd4c7ea90784a8db5def931 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &k3_pds {
index 9433f3bafae4c9db9007fecb410918726ba470e8..aa919b4070272bc127b4c8f6021d5a046549e9bd 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &k3_pds {
index 8b205553cdfb0d446cf3e39ad82e3480169d3511..8f4f944263eb6da96a31e1294af406c935648d33 100644 (file)
 
 &dmsc {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &k3_pds {
index a3ebf5996eacc52c64451e6be9dd30dd4b9f145a..19b2d48c7f8c0bb8d2a2dfe367908da77814ce16 100644 (file)
 
 &sms {
        bootph-all;
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-all;
-       };
 };
 
 &main_pmx0 {
index ac749782bfc49c50914bc64fe53afb23919077f9..8f0307321e843a10ee0696ff41f2e3a8fc83add0 100644 (file)
                    "tchanrt", "rflow";
        bootph-pre-ram;
 };
-
-&sms {
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-pre-ram;
-       };
-};
diff --git a/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt b/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt
deleted file mode 100644 (file)
index 02704c6..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-Texas Instruments TI SCI System Reset Controller
-================================================
-
-Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
-responsible for controlling the state of the IPs that are present.
-Communication between the host processor running an OS and the system
-controller happens through a protocol known as TI SCI [1].
-
-[1] http://processors.wiki.ti.com/index.php/TISCI
-
-System Reset Controller Node
-============================
-The sysreset controller node represents the reset for the overall SoC
-which is managed by the SYSFW. Because this relies on the TI SCI protocol
-to communicate with the SYSFW it must be a child of the sysfw node.
-
-Required Properties:
---------------------
- - compatible: Must be "ti,sci-sysreset"
-
-Example (AM65x):
-----------------
-       sysfw: sysfw {
-               compatible = "ti,am654-system-controller";
-               ...
-               k3_sysreset: sysreset-controller {
-                       compatible = "ti,sci-sysreset";
-               };
-       };