clk: agilex: Add NAND clock support

Add get nand_clk and nand_x clock support.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>

diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index 9927ada201f0e87195e620c0647feda3c398fdc0..d7402999ef53423cd9743a26025ddc968096c6b2 100644 (file)
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -533,7 +533,10 @@ static ulong socfpga_clk_get_rate(struct clk *clk)
        case AGILEX_EMAC2_CLK:
                return clk_get_emac_clk_hz(plat, clk->id);
        case AGILEX_USB_CLK:
+       case AGILEX_NAND_X_CLK:
                return clk_get_l4_mp_clk_hz(plat);
+       case AGILEX_NAND_CLK:
+               return clk_get_l4_mp_clk_hz(plat) / 4;
        default:
                return -ENXIO;
        }