configs: fsl: move DDR specific defines to Kconfig

Moves below DDR specific defines to Kconfig:

CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ded7c11a4c2a53a11a77b86ed8f83a23f6d37792..f42eccef80dd21e182bd7dcdb38c0a8c6bb07bb4 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1005,6 +1005,7 @@ config TARGET_LS2080A_EMU
        select ARCH_MISC_INIT
        select ARM64
        select ARMV8_MULTIENTRY
+       select FSL_DDR_SYNC_REFRESH
        help
          Support for Freescale LS2080A_EMU platform
          The LS2080A Development System (EMULATOR) is a pre silicon
@@ -1031,6 +1032,7 @@ config TARGET_LS1088AQDS
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SD_BOOT
        help
          Support for NXP LS1088AQDS platform
          The LS1088A Development System (QDS) is a high-performance
@@ -1047,6 +1049,8 @@ config TARGET_LS2080AQDS
        select SUPPORT_SPL
        imply SCSI
        imply SCSI_AHCI
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        help
          Support for Freescale LS2080AQDS platform
          The LS2080A Development System (QDS) is a high-performance
@@ -1061,6 +1065,8 @@ config TARGET_LS2080ARDB
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        imply SCSI_AHCI
        help
@@ -1205,6 +1211,7 @@ config TARGET_LS1088ARDB
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SD_BOOT
        help
          Support for NXP LS1088ARDB platform.
          The LS1088A Reference design board (RDB) is a high-performance
@@ -1223,6 +1230,7 @@ config TARGET_LS1021AQDS
        select LS1_DEEP_SLEEP
        select SUPPORT_SPL
        select SYS_FSL_DDR
+       select FSL_DDR_INTERACTIVE
        imply SCSI
 
 config TARGET_LS1021ATWR
@@ -1262,6 +1270,7 @@ config TARGET_LS1043AQDS
        select BOARD_EARLY_INIT_F
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        imply SCSI_AHCI
        help
@@ -1287,6 +1296,9 @@ config TARGET_LS1046AQDS
        select BOARD_LATE_INIT
        select DM_SPI_FLASH if DM_SPI
        select SUPPORT_SPL
+       select FSL_DDR_BIST if !SPL
+       select FSL_DDR_INTERACTIVE  if !SPL
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        help
          Support for Freescale LS1046AQDS platform.
@@ -1304,6 +1316,8 @@ config TARGET_LS1046ARDB
        select DM_SPI_FLASH if DM_SPI
        select POWER_MC34VR500
        select SUPPORT_SPL
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        help
          Support for Freescale LS1046ARDB platform.

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 309ca294601b2e26c1560ebcba114c6f89fecac4..0057f195b38719ae037afe1c5f22b1d1be1397f0 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -37,6 +37,7 @@ config TARGET_B4860QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE if !SPL_BUILD
        imply PANIC_HANG
 
 config TARGET_BSC9131RDB
@@ -51,6 +52,7 @@ config TARGET_BSC9132QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select BOARD_EARLY_INIT_F
+       select FSL_DDR_INTERACTIVE
 
 config TARGET_C29XPCIE
        bool "Support C29XPCIE"
@@ -165,6 +167,7 @@ config TARGET_P1022DS
 config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -273,6 +276,7 @@ config TARGET_T1023RDB
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -282,6 +286,7 @@ config TARGET_T1024RDB
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -290,6 +295,7 @@ config TARGET_T1040QDS
        select ARCH_T1040
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply CMD_SATA
        imply PANIC_HANG
@@ -344,6 +350,8 @@ config TARGET_T2080QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
        imply CMD_SATA
 
 config TARGET_T2080RDB
@@ -360,6 +368,8 @@ config TARGET_T2081QDS
        select ARCH_T2081
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
 
 config TARGET_T4160QDS
        bool "Support T4160QDS"
@@ -383,6 +393,7 @@ config TARGET_T4240QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
        imply CMD_SATA
        imply PANIC_HANG
 
@@ -391,6 +402,7 @@ config TARGET_T4240RDB
        select ARCH_T4240
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
        imply CMD_SATA
        imply PANIC_HANG
 
@@ -402,6 +414,7 @@ config TARGET_KMP204X
        bool "Support kmp204x"
        select ARCH_P2041
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_CRAMFS
        imply FS_CRAMFS
 

diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 2cc180da38972bca7ba7e4890188f8a92b1b5a85..0f253051f26dd5205957abf5bfcf352df9662473 100644 (file)
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -21,6 +21,7 @@ config TARGET_MPC8610HPCD
 config TARGET_MPC8641HPCN
        bool "Support MPC8641HPCN"
        select ARCH_MPC8641
+       select FSL_DDR_INTERACTIVE
        imply SCSI
 
 config TARGET_XPEDITE517X

diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index c5bd8a88760f784f213d5b8e06ccd15679a0df39..1b73df82debc1dc47658dce9616537b68c5b8dc8 100644 (file)
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -20,6 +20,18 @@ config SYS_FSL_DDR_LE
        help
                Access DDR registers in little-endian
 
+config FSL_DDR_BIST
+       bool
+
+config FSL_DDR_INTERACTIVE
+       bool
+
+config FSL_DDR_SYNC_REFRESH
+       bool
+
+config FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       bool
+
 menu "Freescale DDR controllers"
        depends on SYS_FSL_DDR
 

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 252e1272c3e470720b110f4071e8de1d12d99d87..42b333721611bb72c0a1aa44d9119b529de86027 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -194,9 +194,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_FSL_DDR_INTERACTIVE
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 49bb38279a5acca06ef5d357982d8bbc8280bd8a..f385509dafe9cad2257659e9da10b4a04e374bbd 100644 (file)
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -105,7 +105,6 @@
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS1            0x54 /* I2C access */
 #define SPD_EEPROM_ADDRESS2            0x56 /* I2C access */
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 86a1233e322014416c118b96ec5073000c55695c..1413b3dcfe1f0ad19a18b66d43e7ad43085126d5 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -83,7 +83,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index b8a9b5c638bc06ef572657e600726063e4f28ed5..13ca2c395df39aecf1eb769456e66b57da2c92ca 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -67,7 +67,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 13ad04e279f191f22e8405f007e89a4fa81fa7a4..e00a56e2fd9fd447cf2f7168dff3cd17f07b2559 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 6ad0849cec7f7fa620723e68ec456c81281dd16a..280b873aee5814e8b186d80af77bb50ac50032d3 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -45,7 +45,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index b09cbab292a6d44194bb96cbca2197720c3c9878..be600becfe8f499f42291c4a15e7fea29bf31e20 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -56,7 +56,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index bac845682516fdb6f1f1f9dee31fa15601b362a0..5b3933412c2309b945f0520273c78a5d1d70b351 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index d28a35f87b377aec8cc266762002b69ed57f10fc..5ba2b6d64348803c770d46e7c06298149fabe067 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -66,7 +66,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 5da70bb83ed845128c6809435e323e0d6829ddef..9b3485ed4b7f8f46f31811b9130e91c22a02c0c6 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -44,7 +44,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 0edcc2ed72b63a9638cc0d38c1c0dfdd4790c749..de5a7ca959e4a7eef2488067677f1ca2a55a1702 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index cff3ca9bce6067092250b25abb877f5d742c4f37..13fbbb3044b8fbba26a67961c82c8e854daf39e5 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -73,7 +73,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index a3f29c5f9ea46c5aec0476ae64680101fa600a03..b534d4758bbef40326a0f9c461fcb783d483285e 100644 (file)
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -72,7 +72,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS                CONFIG_SYS_CCSRBAR_PHYS_LOW
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD for DDR */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index bb6dd95d598a4151f8f935bea2d89302b4e66065..9318b190ae5f2593f4d40401a5c8e5fd6d5f1a6f 100644 (file)
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -97,7 +97,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * DDR Setup
  */
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index ada00ae8bbdf3fe4f7bbadf1e21795fa1a5b7315..4f6ee223853770714a83ee01a83ee2721b7fc50c 100644 (file)
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -59,7 +59,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE          512u    /* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0
 #define SPD_EEPROM_ADDRESS              0x50

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c72be9fb387aded30efdf7652094e028f8e99524..b0f93abf983cbc27d073efc7fe4316fd8dd540e8 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -236,7 +236,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_INTERACTIVE
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 0

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 2d5c96f3353ee2641e7c452a556e5b119a63c274..147ef7108435afc2f453c33b57f59d30186a4e17 100644 (file)
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -140,7 +140,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 69ec109831a0f51606ffae402525d3bfec1b389e..9ca384cc0caf032390bea281d1e0f1b1a2a777fd 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -189,9 +189,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 1d6a390b72dfe01f773c08e9d7fc57f1b7448eb8..446e4268ef686884780448d9f9981ca63e46fad6 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -175,7 +175,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 42252c7c42a8275c40557365ec6046a459a7fd75..f42a4f4af0fb99d0237d9b413be7ce97a8dd2d4a 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -112,7 +112,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 1bbe9d9b375755dd6c15c17b7372eaa336ef3706..6a0254a55be3318e21dac4084155312270f61c8f 100644 (file)
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -133,7 +133,6 @@
 #define CONFIG_DDR_SPD
 #endif
 #define CONFIG_SYS_SPD_BUS_NUM 1
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1

diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index c762c93ac0aa47c67fc28b0be14c61751d11ac49..d4da9dd213d48099c3930d7ce925a0215369e6ae 100644 (file)
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -94,7 +94,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x54

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 4ad98c69e62362a51596eb178870836a9cee4f8c..d75ac4e57ea254dca904dea2b202b4569fa615c3 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -89,7 +89,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index ed07d9f28e9a1865b9daf2813153e49afd71866b..52b47ad6704e4f7c29a042714b4411309b7d0a16 100644 (file)
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index a0d39878b85e59940d22ced906a82d1f088f6675..6ab83d02a41ab2571ccfc59bcc3adab7cf074e81 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -21,8 +21,6 @@
 
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#define CONFIG_FSL_DDR_BIST
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif

diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 886fe723ba17ea50efc152d3c717c044ed121bf1..6e36baf4ca581ceb0bda761f0344cacdb1a5b591 100644 (file)
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER

diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 77b50dbdad6a9d28ed21293c5a552e2532b5ef8f..f22e863749b0ae6f6577e0ad5ffbbae844c88e9f 100644 (file)
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -24,10 +24,6 @@
 #define CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
 
 #ifdef CONFIG_SD_BOOT
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg

diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index b663937d8cfd5b4bca1cd8bf98e9ab8672a2f449..a80ce92881155e88181f770980d0e16ce3ba71c9 100644 (file)
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -48,10 +48,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#if !defined(CONFIG_SD_BOOT)
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 0a6c90dc8ba33412fcedae820ca247dc05f9e5fd..60a0b42503522578bedd610692e3a544a501dc2b 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -34,9 +34,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif

diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h
index 76ac5363c50078e9d6a58cd9f181d204a98a7a59..d5cb3e4df97293ce897ba33c55cf46eddae913aa 100644 (file)
--- a/include/configs/ls2080a_emu.h
+++ b/include/configs/ls2080a_emu.h
@@ -24,8 +24,6 @@
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
 
-#define CONFIG_FSL_DDR_SYNC_REFRESH
-
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
 /*

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index a23a4edaee223653c40a3946a5552a096f533df2..74c7dc4f8ab2f307635572785710d4f4264e9a10 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -42,7 +42,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -64,8 +63,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #endif
 
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
-
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
 #define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64*1024*1024)

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 7308d72e5ddf1592bd4a8faec19f6e914ff2a0ad..e41ace668594892f502102da5705035dbc1928f2 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -57,7 +57,6 @@ unsigned long get_board_sys_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -80,7 +79,6 @@ unsigned long get_board_sys_clk(void);
 #endif
 
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 0e1f9836a6485bc297c6b0bf992a820ecff06860..8fda0c1e226cc9c4efcc886c9605bfece3aebf63 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -266,7 +266,6 @@
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS 0x52
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD))
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_2G

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index f0b165591c9adbce6753fc6d7c5fd11af76b09e3..9df8604af712a368d5c4982583b0a42b5b944823 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_DDR_ECC                  /* only for ECC DDR module */
 /*
  * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 9fa8917a9bc0b25956114fdba3ba79273bf71969..3f84fabdb60e03b1d8d6bf96abfd86fd39f4bc82 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -60,7 +60,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index bca5961206e75a1c0cca912de3bc89f497056dc9..bf375019128169b2144b53f4e9d3502887a7913d 100644 (file)
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -73,7 +73,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 

diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 206f0c13a4f12bef2772d41b18494a60683c9aee..5737cfee950cdde21aab0e485af593f9566385ff 100644 (file)
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -25,7 +25,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef

diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index e6eea8dfc29c15a0df230d54299a69bce3d452c3..22dd3c036eb8c67a6f5bf5595fe0d7ae7a1948ab 100644 (file)
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -33,7 +33,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 346c388d206da9504cb42170a4701afdb1ac02ff..db00376d92f616194c05139a7fef1795826de07e 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -624,10 +624,6 @@ CONFIG_FSL_CADMUS
 CONFIG_FSL_CORENET
 CONFIG_FSL_CPLD
 CONFIG_FSL_DCU_SII9022A
-CONFIG_FSL_DDR_BIST
-CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
-CONFIG_FSL_DDR_INTERACTIVE
-CONFIG_FSL_DDR_SYNC_REFRESH
 CONFIG_FSL_DEEP_SLEEP
 CONFIG_FSL_DEVICE_DISABLE
 CONFIG_FSL_DIU_CH7301