clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@
fe310000
Adding some debug prints I can see:
MMC: mmc@
fe320000: Got clock clock-controller@
ff760000 76
mmc@
fe310000: Got clock clock-controller@
ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@
fe310000: 3, mmc@
fe320000: 1, mmc@
fe330000: 0
According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.
Add support for the clock to avoid the error.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>