From de34a61642eda0b64b34dd4d9eeda57eb01f76bc Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Tue, 30 Jun 2020 12:33:16 +0200
Subject: [PATCH] mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach
 init code

This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
---
 arch/mips/Kconfig     | 9 +++++++++
 arch/mips/cpu/start.S | 5 +++++
 2 files changed, 14 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index eb00ee71bc..652e6a993e 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -270,6 +270,15 @@ config MIPS_CACHE_INDEX_BASE
 	  Normally this is CKSEG0. If the MIPS system needs to move this block
 	  to some SRAM or ScratchPad RAM, adapt this option accordingly.
 
+config MIPS_MACH_EARLY_INIT
+	bool "Enable mach specific very early init code"
+	help
+	  Use this to enable the call to mips_mach_early_init() very early
+	  from start.S. This function can be used e.g. to do some very early
+	  CPU / SoC intitialization or image copying. Its called very early
+	  and at this stage the PC might not match the linking address
+	  (CONFIG_TEXT_BASE) - no absolute jump done until this call.
+
 config MIPS_CACHE_SETUP
 	bool "Allow generic start code to initialize and setup caches"
 	default n if SKIP_LOWLEVEL_INIT
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index e22771715c..d0c412236d 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -236,6 +236,11 @@ wr_done:
 # endif
 #endif
 
+#ifdef CONFIG_MIPS_MACH_EARLY_INIT
+	bal	mips_mach_early_init
+	 nop
+#endif
+
 #ifdef CONFIG_MIPS_CACHE_SETUP
 	/* Initialize caches... */
 	PTR_LA	t9, mips_cache_reset
-- 
2.39.5