From 484a878273539949c1dd97ad0e4c97c35acac87a Mon Sep 17 00:00:00 2001
From: Quentin Schulz <quentin.schulz@bootlin.com>
Date: Fri, 31 Aug 2018 16:28:31 +0200
Subject: [PATCH] arm: spear: fix enabling of SSP2 clock
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
---
arch/arm/include/asm/arch-spear/spr_misc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-spear/spr_misc.h b/arch/arm/include/asm/arch-spear/spr_misc.h
index 01b4b2bee3..0171119351 100644
--- a/arch/arm/include/asm/arch-spear/spr_misc.h
+++ b/arch/arm/include/asm/arch-spear/spr_misc.h
@@ -151,7 +151,7 @@ struct misc_regs {
#define MISC_GPT2ENB 0x00000800
#define MISC_FSMCENB 0x00000200
#define MISC_I2CENB 0x00000080
-#define MISC_SSP2ENB 0x00000070
+#define MISC_SSP2ENB 0x00000040
#define MISC_SSP1ENB 0x00000020
#define MISC_UART0ENB 0x00000008
--
2.39.5