From 3a217346051ac8876d63becd12b6ddb7a72e82f9 Mon Sep 17 00:00:00 2001
From: Amit Singh Tomar <amittomer25@gmail.com>
Date: Sat, 9 May 2020 19:55:09 +0530
Subject: [PATCH] clk: actions: Add Ethernet clocks

This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
---
 arch/arm/include/asm/arch-owl/regs_s700.h | 2 ++
 arch/arm/include/asm/arch-owl/regs_s900.h | 4 ++++
 drivers/clk/owl/clk_owl.c                 | 9 +++++++++
 drivers/clk/owl/clk_owl.h                 | 2 --
 4 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h b/arch/arm/include/asm/arch-owl/regs_s700.h
index 2f21c15cca..90459ae95e 100644
--- a/arch/arm/include/asm/arch-owl/regs_s700.h
+++ b/arch/arm/include/asm/arch-owl/regs_s700.h
@@ -53,4 +53,6 @@
 #define CMU_CVBSPLL		0x00B8
 #define CMU_SSTSCLK		0x00C0
 
+#define CMU_DEVCLKEN1_ETH	BIT(23)
+
 #endif
diff --git a/arch/arm/include/asm/arch-owl/regs_s900.h b/arch/arm/include/asm/arch-owl/regs_s900.h
index 9e9106ddaa..084bc9b8c3 100644
--- a/arch/arm/include/asm/arch-owl/regs_s900.h
+++ b/arch/arm/include/asm/arch-owl/regs_s900.h
@@ -61,4 +61,8 @@
 #define CMU_TVOUTPLLDEBUG0			(0x00EC)
 #define CMU_TVOUTPLLDEBUG1			(0x00FC)
 
+#define CMU_DEVCLKEN1_ETH			BIT(22)
+#define CLK_ETHERNET				CLK_ETH_MAC
+#define CMU_ETHERNETPLL				CMU_ASSISTPLL
+
 #endif
diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 9715fce162..1999c87a33 100644
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -87,6 +87,11 @@ int owl_clk_enable(struct clk *clk)
 		/* Enable UART3 interface clock */
 		setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
 		break;
+	case CLK_RMII_REF:
+	case CLK_ETHERNET:
+		setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+		setbits_le32(priv->base + CMU_ETHERNETPLL, 5);
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -112,6 +117,10 @@ int owl_clk_disable(struct clk *clk)
 		/* Disable UART3 interface clock */
 		clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
 		break;
+	case CLK_RMII_REF:
+	case CLK_ETHERNET:
+		clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+		break;
 	default:
 		return -EINVAL;
 	}
diff --git a/drivers/clk/owl/clk_owl.h b/drivers/clk/owl/clk_owl.h
index cf896bdb98..a01f81a6a7 100644
--- a/drivers/clk/owl/clk_owl.h
+++ b/drivers/clk/owl/clk_owl.h
@@ -62,6 +62,4 @@ struct owl_clk_priv {
 #define CMU_DEVCLKEN1_UART5	BIT(21)
 #define CMU_DEVCLKEN1_UART3	BIT(11)
 
-#define CMU_DEVCLKEN1_ETH_S700	BIT(23)
-
 #endif
-- 
2.39.5