From b713e0291ba90847058678ae2752f08f238c8fe3 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 16 Jul 2019 17:27:04 +0530
Subject: [PATCH] ram: rk3399: Add ddr version enc macro
Add dram config macro for handling ddr version number.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
---
arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++
drivers/ram/rockchip/sdram_rk3399.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index f5c99fea8b..8027b53636 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -66,6 +66,7 @@ struct sdram_base_params {
* [1:0] dbw_ch0
*/
#define SYS_REG_DDRTYPE_SHIFT 13
+#define DDR_SYS_REG_VERSION 2
#define SYS_REG_DDRTYPE_MASK 7
#define SYS_REG_NUM_CH_SHIFT 12
#define SYS_REG_NUM_CH_MASK 1
@@ -99,6 +100,7 @@ struct sdram_base_params {
#define SYS_REG_DBW_MASK 3
#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
+#define SYS_REG_ENC_VERSION(n) ((n) << 28)
#define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
(os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index fed9f94840..750219921b 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1102,6 +1102,7 @@ static void dram_all_config(struct dram_info *dram,
SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, sys_reg2,
sys_reg3, channel);
sys_reg3 |= SYS_REG_ENC_CS1_COL(info->cap_info.col, channel);
+ sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
ddr_msch_regs = dram->chan[channel].msch;
noc_timing = ¶ms->ch[channel].noc_timings;
--
2.39.5