From 31d4045d4be8263828689c7eb6ff4e72071ad5ce Mon Sep 17 00:00:00 2001
From: Andrejs Cainikovs <Andrejs.Cainikovs@netmodule.com>
Date: Fri, 1 Mar 2019 13:27:59 +0000
Subject: [PATCH] net: dm: fec: Support phy-reset-post-delay property
As per Linux kernel DT binding doc:
- phy-reset-post-delay : Post reset delay in milliseconds. If present then
a delay of phy-reset-post-delay milliseconds will be observed after the
phy-reset-gpios has been toggled. Can be omitted thus no delay is
observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
---
drivers/net/fec_mxc.c | 11 +++++++++++
drivers/net/fec_mxc.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index f991b40b38..84f010d805 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1309,6 +1309,8 @@ static void fec_gpio_reset(struct fec_priv *priv)
dm_gpio_set_value(&priv->phy_reset_gpio, 1);
mdelay(priv->reset_delay);
dm_gpio_set_value(&priv->phy_reset_gpio, 0);
+ if (priv->reset_post_delay)
+ mdelay(priv->reset_post_delay);
}
}
#endif
@@ -1468,6 +1470,15 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev)
/* property value wrong, use default value */
priv->reset_delay = 1;
}
+
+ priv->reset_post_delay = dev_read_u32_default(dev,
+ "phy-reset-post-delay",
+ 0);
+ if (priv->reset_post_delay > 1000) {
+ printf("FEC MXC: phy reset post delay should be <= 1000ms\n");
+ /* property value wrong, use default value */
+ priv->reset_post_delay = 0;
+ }
#endif
return 0;
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index e9a661f0a1..e5f2dd75c5 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -258,6 +258,7 @@ struct fec_priv {
#ifdef CONFIG_DM_GPIO
struct gpio_desc phy_reset_gpio;
uint32_t reset_delay;
+ uint32_t reset_post_delay;
#endif
#ifdef CONFIG_DM_ETH
u32 interface;
--
2.39.5