From 1956e431f8b0d1f4731794d9969d8e98240fefb4 Mon Sep 17 00:00:00 2001 From: Timur Tabi <timur@freescale.com> Date: Tue, 23 Oct 2012 10:48:09 +0000 Subject: [PATCH] powerpc/85xx/p5040: add CONFIG_SYS_PPC64, del CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC The P5040 has an e5500 core, so CONFIG_SYS_PPC64 should be defined in config_mpc85xx.h. This macro was absent in the initial P5040 patch because it crossed paths with the patch that introduced the macro. Also delete CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC, since it's not used in the upstream U-Boot. It's a holdover from the SDK. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> --- arch/powerpc/include/asm/config_mpc85xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 03baaee1b7..6666d3d283 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -449,6 +449,7 @@ #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #elif defined(CONFIG_PPC_P5040) +#define CONFIG_SYS_PPC64 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 @@ -472,7 +473,6 @@ #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_ERRATUM_A004699 -#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC #define CONFIG_SYS_FSL_ERRATUM_A004510 #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 -- 2.39.5