From 05b884b5cd56478ba617b5c6a0538efe590fe098 Mon Sep 17 00:00:00 2001 From: Chin Liang See <clsee@altera.com> Date: Tue, 10 Jun 2014 01:11:04 -0500 Subject: [PATCH] socfpga: Adding DesignWare watchdog support To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> --- .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 + include/configs/socfpga_cyclone5.h | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index f564046bc0..f2ecbbdd04 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -11,6 +11,7 @@ #define SOCFPGA_UART0_ADDRESS 0xffc02000 #define SOCFPGA_UART1_ADDRESS 0xffc03000 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000 #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 0254249751..34291c7391 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -205,6 +205,17 @@ #define CONFIG_ENV_IS_NOWHERE +/* + * L4 Watchdog + */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000 +#define CONFIG_DESIGNWARE_WATCHDOG +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS +/* Clocks source frequency to watchdog timer */ +#define CONFIG_DW_WDT_CLOCK_KHZ 25000 + + /* * SPL "Second Program Loader" aka Initial Software */ @@ -237,4 +248,7 @@ /* Support for lib/libgeneric.o in SPL binary */ #define CONFIG_SPL_LIBGENERIC_SUPPORT +/* Support for watchdog */ +#define CONFIG_SPL_WATCHDOG_SUPPORT + #endif /* __CONFIG_H */ -- 2.39.5