From cc009defa4211aa58b3387b59d568cf8ea863ef4 Mon Sep 17 00:00:00 2001
From: Sebastien Jan <s-jan@ti.com>
Date: Wed, 13 Jun 2012 05:16:40 +0000
Subject: [PATCH] omap4: Use a smaller M,N couple for IVA DPLL
This reduced M,N couple corresponds to the advised value from
TI HW team.
Tested on 4460 Pandaboard, it also provides peripheral clocks
closer to the advised values.
Signed-off-by: Sebastien Jan <s-jan@ti.com>
---
arch/arm/cpu/armv7/omap4/clocks.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c
index c568951a91..1d92e66545 100644
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -146,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
{727, 14, -1, -1, 4, 7, -1, -1}, /* 19.2 MHz */
{931, 25, -1, -1, 4, 7, -1, -1}, /* 26 MHz */
{931, 26, -1, -1, 4, 7, -1, -1}, /* 27 MHz */
- {412, 16, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */
+ {291, 11, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */
};
/* ABE M & N values with sys_clk as source */
--
2.39.5