From 670db88c79ce88ff6c053f6507404bd6752b664f Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@amd.com>
Date: Wed, 20 Dec 2023 15:53:28 +0100
Subject: [PATCH] riscv: Extend board compatible string with "qemu,mbv"
Extend compatible string to match the latest change in dt binding.
Fixes: 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
arch/riscv/dts/xilinx-mbv32.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts
index 6a6b8b694b..94e42c2681 100644
--- a/arch/riscv/dts/xilinx-mbv32.dts
+++ b/arch/riscv/dts/xilinx-mbv32.dts
@@ -12,7 +12,7 @@
#address-cells = <1>;
#size-cells = <1>;
model = "AMD MicroBlaze V 32bit";
- compatible = "amd,mbv";
+ compatible = "qemu,mbv", "amd,mbv";
cpus: cpus {
#address-cells = <1>;
--
2.39.5