From 3af709092c6d92cf7e4e19a45fbb96e2e4d1c8f5 Mon Sep 17 00:00:00 2001 From: Michal Simek <michal.simek@xilinx.com> Date: Thu, 10 Dec 2015 15:24:23 +0100 Subject: [PATCH] net: emaclite: Use indirect register access for rx_ping/pong Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- drivers/net/xilinx_emaclite.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 654ad58cea..724b61e0b7 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -364,11 +364,10 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis) * RX - RX_PING & RX_PONG initialization */ /* Write out the value to flush the RX buffer */ - out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); + out_be32(®s->rx_ping_rsr, XEL_RSR_RECV_IE_MASK); if (emaclite->rxpp) - out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_RSR_RECV_IE_MASK); + out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK); -- 2.39.5