From 1b2af9b4e23d396dca3eaa06fc9804659d22df0d Mon Sep 17 00:00:00 2001 From: York Sun <yorksun@freescale.com> Date: Mon, 27 Oct 2014 11:45:11 -0700 Subject: [PATCH] powerpc/t1040qds: Update DDR option Enable interactive debugging by default. Remove DDR controller interleaving because this SoC only has one controller. Use auto chip-select interleaving to detect number of ranks. Signed-off-by: York Sun <yorksun@freescale.com> CC: Poonam Aggrwal <poonam.aggrwal@freescale.com> --- include/configs/T1040QDS.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2178f9d1fd..2ae0f4807a 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -176,8 +176,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DDR_SPD #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 -#define CONFIG_FSL_DDR_INTERACTIVE #endif +#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -768,8 +768,7 @@ unsigned long get_board_ddr_clk(void); #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=cs0_cs1;" \ + "hwconfig=fsl_ddr:bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "video-mode=fslfb:1024x768-32@60,monitor=dvi\0" \ -- 2.39.5