From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Date: Tue, 21 Jul 2020 06:21:53 +0000 (+0900)
Subject: ARM: renesas: Add generic timer initialization for V3U Falcon
X-Git-Url: http://git.dujemihanovic.xyz/html/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=b3494132f068906a73e86826ffb7b19f4ad5ec5f;p=u-boot.git

ARM: renesas: Add generic timer initialization for V3U Falcon

Init the Generic Timer for V3U Falcon in early phase

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---

diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index 3e591e4b42..c3241bc21d 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -20,6 +20,31 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CPGWPR		0xE6150000
 #define CPGWPCR		0xE6150004
 
+#define EXTAL_CLK	16666600u
+#define CNTCR_BASE	0xE6080000
+#define CNTFID0		(CNTCR_BASE + 0x020)
+#define CNTCR_EN	BIT(0)
+
+static void init_generic_timer(void)
+{
+	u32 freq;
+
+	/* Set frequency data in CNTFID0 */
+	freq = EXTAL_CLK;
+
+	/* Update memory mapped and register based freqency */
+	asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
+	writel(freq, CNTFID0);
+
+	/* Enable counter */
+	setbits_le32(CNTCR_BASE, CNTCR_EN);
+}
+
+void s_init(void)
+{
+	init_generic_timer();
+}
+
 int board_early_init_f(void)
 {
 	/* Unlock CPG access */