]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
serial: serial_pl01x: Implement .getinfo() for PL01
authorMaximilian Brune <maximilian.brune@9elements.com>
Wed, 23 Oct 2024 13:19:48 +0000 (15:19 +0200)
committerTom Rini <trini@konsulko.com>
Sun, 27 Oct 2024 23:24:12 +0000 (17:24 -0600)
When ACPI is enabled on arm it will use the getinfo function to fill
the SPCR ACPI table.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
boot/bootflow.c
drivers/serial/serial_pl01x.c
include/serial.h

index 59d77d2385f4e566911cab792a850319cf16864d..d8807eb109dff724f24c43e58adc4ab57762cfa9 100644 (file)
@@ -936,11 +936,15 @@ int bootflow_cmdline_auto(struct bootflow *bflow, const char *arg)
                return ret;
 
        *buf = '\0';
-       if (!strcmp("earlycon", arg)) {
+       if (!strcmp("earlycon", arg) && info.type == SERIAL_CHIP_16550_COMPATIBLE) {
                snprintf(buf, sizeof(buf),
                         "uart8250,mmio32,%#lx,%dn8", info.addr,
                         info.baudrate);
-       } else if (!strcmp("console", arg)) {
+       } else if (!strcmp("earlycon", arg) && info.type == SERIAL_CHIP_PL01X) {
+               snprintf(buf, sizeof(buf),
+                        "pl011,mmio32,%#lx,%dn8", info.addr,
+                        info.baudrate);
+       } else if (!strcmp("console", arg) && info.type == SERIAL_CHIP_16550_COMPATIBLE) {
                snprintf(buf, sizeof(buf),
                         "ttyS0,%dn8", info.baudrate);
        }
index 80c35963b8f2988af861c1f02e6c368799c2e012..e6bf0c2935b8b948b33b2830c23974f0d15ffd7b 100644 (file)
@@ -19,6 +19,7 @@
 #include <watchdog.h>
 #include <asm/io.h>
 #include <serial.h>
+#include <spl.h>
 #include <dm/device_compat.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <linux/compiler.h>
@@ -272,6 +273,28 @@ __weak struct serial_device *default_serial_console(void)
        return &pl01x_serial_drv;
 }
 #else
+
+static int pl01x_serial_getinfo(struct udevice *dev,
+                               struct serial_device_info *info)
+{
+       struct pl01x_serial_plat *plat = dev_get_plat(dev);
+
+       /* save code size */
+       if (!not_xpl())
+               return -ENOSYS;
+
+       info->type = SERIAL_CHIP_PL01X;
+       info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
+       info->addr = plat->base;
+       info->size = 0x1000;
+       info->reg_width = 4;
+       info->reg_shift = 2;
+       info->reg_offset = 0;
+       info->clock = plat->clock;
+
+       return 0;
+}
+
 int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
 {
        struct pl01x_serial_plat *plat = dev_get_plat(dev);
@@ -341,6 +364,7 @@ static const struct dm_serial_ops pl01x_serial_ops = {
        .pending = pl01x_serial_pending,
        .getc = pl01x_serial_getc,
        .setbrg = pl01x_serial_setbrg,
+       .getinfo = pl01x_serial_getinfo,
 };
 
 #if CONFIG_IS_ENABLED(OF_REAL)
index d129dc3253ccb8cdf283e9a40dc723055cc44d69..d7a9a8cfb8bc48cbeb790d43df983a333b228d36 100644 (file)
@@ -124,6 +124,7 @@ enum serial_stop {
 enum serial_chip_type {
        SERIAL_CHIP_UNKNOWN = -1,
        SERIAL_CHIP_16550_COMPATIBLE,
+       SERIAL_CHIP_PL01X,
 };
 
 enum adr_space_type {