ARM: stm32: Fix TAMP_SMCR BKP..PROT fields on STM32MP15xx

Update the TAMP_SMCR BKP..PROT fields to put first 10 registers
into protection zone 1 and next 5 into zone 2. This fixes use of
boot counter which is often in zone 3 and has to be updated from
Linux, which runs in NS.

Fixes: 73f7fc944cf6 ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
index f096fe538d88d3472ef2a00f1e8822f1c9c2eb9d..ca202bec8eea72281ba330b741c972bdc6b07ade 100644 (file)
--- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
@@ -148,8 +148,8 @@ static void security_init(void)
         */
        clrsetbits_le32(TAMP_SMCR,
                        TAMP_SMCR_BKPRWDPROT | TAMP_SMCR_BKPWDPROT,
-                       FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x20) |
-                       FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x20));
+                       FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x0A) |
+                       FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x0F));
 
        /* GPIOZ: deactivate the security */
        writel(BIT(0), RCC_MP_AHB5ENSETR);