]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS
authorVladimir Oltean <vladimir.oltean@nxp.com>
Tue, 29 Jun 2021 17:53:11 +0000 (20:53 +0300)
committerRamon Fried <rfried.dev@gmail.com>
Tue, 6 Jul 2021 02:22:41 +0000 (05:22 +0300)
Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.

Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.

Fixes: a7fdac7e2a2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi

index fb1836a8aef358c3bdb920227c6869b781ee1c8b..5a0f060c16e5dbcae2263cd2ce44a4ef7e3e4635 100644 (file)
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -47,3 +51,8 @@
        phy-mode = "sgmii-2500";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 1d02a3e11def8c31dcaf2cbf9a7f8e48f9631ebd..39a83e10c4ce6c2b2a9407a8db83e27e65fa4104 100644 (file)
@@ -9,6 +9,10 @@
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -24,3 +28,8 @@
        phy-mode = "sgmii-2500";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index c92dd1bd2e95358ad83d4f7cf0276f3d2d67aa1d..021fe3fbc67a77e3913a8df55775aa52c4a95c29 100644 (file)
        #include "fsl-sch-24801.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -61,3 +65,8 @@
        phy-mode = "sgmii";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 941f7472eb09217ec7f2c5590a48f8d5a0ac01a4..b6704d8089a8d30e7b790b55a7149676b11761b0 100644 (file)
        #include "fsl-sch-24801.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -46,3 +50,8 @@
        phy-mode = "sgmii";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 7e483e656e28dcf3568f41e975fd5479ac0f7db2..8c10897e565c9dffac8db8c4c55acaae23ef7602 100644 (file)
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -46,3 +50,8 @@
        phy-mode = "usxgmii";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 49fffdb9cb2a283ea5bfcb8eb7b22b01be6de777..1d800dacef89803bd3757c63a9e2eb1b7074acb3 100644 (file)
        #include "fsl-sch-28021.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -40,3 +44,8 @@
        phy-mode = "qsgmii";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 8347462f4cb059dff743b21b50a0f8f54415e938..1fb2cdf0c244ccbf0346345af82e93d85d2e8ce8 100644 (file)
@@ -9,6 +9,10 @@
 #include "fsl-sch-30842.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -18,3 +22,8 @@
        phy-mode = "sgmii-2500";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};
index 6be3b5094c811dcdffe6042a6d5989f6a83fda22..2333f74e5ae136580cb42d701213e09548800d21 100644 (file)
@@ -9,6 +9,10 @@
 #include "fsl-sch-30842.dtsi"
 };
 
+&enetc2 {
+       status = "okay";
+};
+
 &mscc_felix {
        status = "okay";
 };
@@ -18,3 +22,8 @@
        phy-mode = "sgmii-2500";
        phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
 };
+
+&mscc_felix_port4 {
+       ethernet = <&enetc2>;
+       status = "okay";
+};