ddr: marvell: a38x: add support for twin-die combined memory device

commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream.

the twin-die combined memory device should be treatened as X8
device and not as X16 one

Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
[ - the default value for twin_die_combined is set to NOT_COMBINED for
    all boards, as this was default behaviour prior this change ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 0353d58a361b256f84298fe6d6a903c9e74c624b..1d3cefe703b8f49c4fdaec5d1dbcc4fdd5138f93 100644 (file)
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -286,6 +286,7 @@ static struct mv_ddr_topology_map board_topology_map_1g = {
            MV_DDR_TIM_2T} },           /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 };
@@ -308,6 +309,7 @@ static struct mv_ddr_topology_map board_topology_map_2g = {
            MV_DDR_TIM_2T} },           /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 };

diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
index 163a1b3de9d2cf162c3a0568699a3ef9fb5bfee8..122c63d11f997164407e2c06a640ad2d71c83979 100644 (file)
--- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
+++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
@@ -73,6 +73,7 @@ static struct mv_ddr_topology_map board_topology_map = {
            MV_DDR_TIM_DEFAULT} },      /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 };

diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
index 06307e582cec7ebc42fafc2c72fde49e24a3e9a9..1edc1cb6515c6be692a413217ad316c97d18d6f7 100644 (file)
--- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -94,6 +94,7 @@ static struct mv_ddr_topology_map board_topology_map = {
            MV_DDR_TIM_DEFAULT} },      /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 };

diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index d602092d7329811c47a1a2238de1e414e99559d5..7bcfa828d7ca891e6e672998b991f5f3b06a87df 100644 (file)
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -68,6 +68,7 @@ static struct mv_ddr_topology_map board_topology_map = {
            MV_DDR_TIM_2T} },           /* timing */
        BUS_MASK_32BIT_ECC,             /* subphys mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0},                            /* timing parameters */
        { {0} },                        /* electrical configuration */

diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c
index ba57a272187e2e1036c488aeed23a3bd19ce8ad5..4f1dc3b4316e421d2620c2e30265de568576ff8b 100644 (file)
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -71,6 +71,7 @@ static struct mv_ddr_topology_map ddr_topology_map = {
            MV_DDR_TIM_DEFAULT} },      /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 

diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c
index adb091ce4fd3c32b427d84956fab5911f58ae0bc..9c5b687b3e8bb7e22bd99e48256e8805aae5eb05 100644 (file)
--- a/board/kobol/helios4/helios4.c
+++ b/board/kobol/helios4/helios4.c
@@ -71,6 +71,7 @@ static struct mv_ddr_topology_map board_topology_map = {
            MV_DDR_TIM_DEFAULT} },      /* timing */
        BUS_MASK_32BIT_ECC,             /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0}                             /* timing parameters */
 };

diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 7b2accf01de601e948d85ae1cf3b84a009808cd0..c920cf8d6b5025a89e018c4e5d1bd66f610dc5cc 100644 (file)
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -142,6 +142,7 @@ static struct mv_ddr_topology_map board_topology_map = {
            MV_DDR_TIM_DEFAULT} },      /* timing */
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       NOT_COMBINED,                   /* ddr twin-die combined */
        { {0} },                        /* raw spd data */
        {0},                            /* timing parameters */
        { {0} },                        /* electrical configuration */

diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index 3991fec272ca2f2a6e94b962a323a81de40ad00e..461f091472193d85954f5a34b15f1cc63e4c82b5 100644 (file)
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -14,6 +14,11 @@
 #define MV_DDR_MAX_BUS_NUM     9
 #define MV_DDR_MAX_IFACE_NUM   1
 
+enum mv_ddr_twin_die {
+       COMBINED,
+       NOT_COMBINED,
+};
+
 struct bus_params {
        /* Chip Select (CS) bitmask (bits 0-CS0, bit 1- CS1 ...) */
        u8 cs_bitmask;
@@ -47,6 +52,9 @@ struct if_params {
        /* The DDR frequency for each interfaces */
        enum mv_ddr_freq memory_freq;
 
+    /* ddr twin-die */
+       enum mv_ddr_twin_die twin_die_combined;
+
        /*
         * delay CAS Write Latency
         * - 0 for using default value (jedec suggested)
@@ -113,6 +121,9 @@ struct mv_ddr_topology_map {
        /* source of ddr configuration data */
        enum mv_ddr_cfg_src cfg_src;
 
+       /* ddr twin-die */
+       enum mv_ddr_twin_die twin_die_combined;
+
        /* raw spd data */
        union mv_ddr_spd_data spd_data;
 
@@ -193,6 +204,7 @@ struct mv_ddr_iface {
 
        /* ddr interface topology map */
        struct mv_ddr_topology_map tm;
+
 };
 
 struct mv_ddr_iface *mv_ddr_iface_get(void);

diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.c b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
index c4c3ab72b2cd6c6a36a31d01b1558481d7ce72f4..2db6283c2382eee8ffc614ebe6da60c6e6743ff4 100644 (file)
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
@@ -127,6 +127,11 @@ int mv_ddr_topology_map_update(void)
                speed_bin_index = iface_params->speed_bin_index;
                freq = iface_params->memory_freq;
 
+               if (tm->twin_die_combined == COMBINED) {
+                       iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT;
+                       iface_params->memory_size -= 1;
+               }
+
                if (iface_params->cas_l == 0)
                        iface_params->cas_l = mv_ddr_cl_val_get(speed_bin_index, freq);
 
@@ -281,7 +286,6 @@ unsigned long long mv_ddr_mem_sz_per_cs_get(void)
        mem_sz_per_cs = (unsigned long long)mem_size[iface_params->memory_size] *
                        (unsigned long long)sphys /
                        (unsigned long long)sphys_per_dunit;
-
        return mem_sz_per_cs;
 }