From cb1de6067aae8bd3dc8161db0d92f19a4e60942a Mon Sep 17 00:00:00 2001
From: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Date: Tue, 9 Jun 2020 16:21:48 +0530
Subject: [PATCH] armv8: ls1012a: RGMII ports require internal delay

The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 board/freescale/ls1012ardb/eth.c | 2 +-
 drivers/net/pfe_eth/pfe_eth.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index 63d40de2a3..a65ff4dc9c 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -113,7 +113,7 @@ int pfe_eth_board_init(struct udevice *dev)
 			/* MAC2 */
 			pfe_set_phy_address_mode(priv->gemac_port,
 						 CONFIG_PFE_EMAC2_PHY_ADDR,
-						 PHY_INTERFACE_MODE_RGMII_TXID);
+						 PHY_INTERFACE_MODE_RGMII_ID);
 		}
 		break;
 	case 0x2208:
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index 718e24f14d..e49bf4a6f3 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -33,7 +33,7 @@ struct gemac_s gem_info[] = {
 
 		/* phy iface */
 		.phy_address = CONFIG_PFE_EMAC2_PHY_ADDR,
-		.phy_mode = PHY_INTERFACE_MODE_RGMII_TXID,
+		.phy_mode = PHY_INTERFACE_MODE_RGMII_ID,
 	},
 };
 
-- 
2.39.5