From f655090901dce2a3890efb07c3f341d5b8bc2ae9 Mon Sep 17 00:00:00 2001
From: Sam Protsenko <semen.protsenko@linaro.org>
Date: Tue, 7 Nov 2023 15:22:00 -0600
Subject: [PATCH] clk: exynos: Add header guard for clk-pll.h

The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 166097e87753 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/clk/exynos/clk-pll.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index c79aac4425..7b7af5e676 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -5,4 +5,9 @@
  * Thomas Abraham <thomas.ab@samsung.com>
  */
 
+#ifndef __EXYNOS_CLK_PLL_H
+#define __EXYNOS_CLK_PLL_H
+
 unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);
+
+#endif /* __EXYNOS_CLK_PLL_H */
-- 
2.39.5