From f13a830e6e4ad884069e25c7cd2dc333b474da98 Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Thu, 18 Apr 2024 14:01:00 -0500 Subject: [PATCH] mmc: am654_sdhci: Fix ITAPDLY for HS400 timing At HS400 mode the ITAPDLY value is that from High Speed mode which is incorrect and may cause boot failures. The ITAPDLY for HS400 speed mode should be the same as ITAPDLY as HS200 timing after tuning is executed. Add the functionality to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY. Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez --- drivers/mmc/am654_sdhci.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index e1047812fa..fadab7d40b 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -295,6 +295,11 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) return ret; plat->dll_enable = true; + if (mode == MMC_HS_400) { + plat->itap_del_ena[mode] = ENABLE; + plat->itap_del_sel[mode] = plat->itap_del_sel[mode - 1]; + } + am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode], plat->itap_del_ena[mode]); } else { @@ -486,6 +491,9 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) itap = am654_sdhci_calculate_itap(dev, fail_window, fail_index, plat->dll_enable); + /* Save ITAPDLY */ + plat->itap_del_sel[mode] = itap; + am654_sdhci_write_itapdly(plat, itap, plat->itap_del_ena[mode]); return 0; -- 2.39.5