From ef6fcab85f2f924f44f9a504302343bf248ab2fe Mon Sep 17 00:00:00 2001 From: Konstantin Porotchkin Date: Mon, 25 Jul 2022 14:13:02 +0200 Subject: [PATCH] mvebu: pinctrl: apply SDHCI PHY config for A7K Current pin control driver applies SDHCI PHY MUX selection when board DT calls for eMMC function on MPP wires. However, for CP side eMMC, only the "armada-8k-cpm-pinctrl" compatibility string is taken into account, which causes CP-SDHCI on Armada-7K boards to fail. This patch adds "armada-7k-pinctrl" compatibility string handling for the CP-SDHCI PHY configuration case. Signed-off-by: Konstantin Porotchkin Reviewed-by: Igal Liberman Reviewed-by: Stefan Roese --- drivers/pinctrl/mvebu/pinctrl-mvebu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index 536c6aff96..fd49a97b5b 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -52,7 +52,9 @@ void mvebu_pinctl_emmc_set_mux(struct udevice *dev, u32 pin, u32 func) EMMC_PHY_CTRL_SDPHY_EN); } } else if (!fdt_node_check_compatible(blob, node, - "marvell,armada-8k-cpm-pinctrl")) { + "marvell,armada-8k-cpm-pinctrl") || + !fdt_node_check_compatible(blob, node, + "marvell,armada-7k-pinctrl")) { if ((pin == CP110_EMMC_CLK_PIN_ID) && (func == CP110_EMMC_CLK_FUNC)) { clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG, -- 2.39.5