From edf0acb3b462732cc236f2a8d00abb82abebf38d Mon Sep 17 00:00:00 2001
From: Rick Chen <rick@andestech.com>
Date: Wed, 28 Aug 2019 18:46:07 +0800
Subject: [PATCH] riscv: ae350: use the v5l2 driver to configure the cache

Find the UCLASS_CACHE driver to configure the cache controller's
settings.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 board/AndesTech/ax25-ae350/ax25-ae350.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index 3d65ce7b75..b43eebb7a6 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -11,6 +11,7 @@
 #include <linux/io.h>
 #include <faraday/ftsmc020.h>
 #include <fdtdec.h>
+#include <dm.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -93,10 +94,18 @@ int smc_init(void)
 	return 0;
 }
 
+static void v5l2_init(void)
+{
+	struct udevice *dev;
+
+	uclass_get_device(UCLASS_CACHE, 0, &dev);
+}
+
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
 	smc_init();
+	v5l2_init();
 
 	return 0;
 }
-- 
2.39.5